ARM: mach-imx: imx6sx: Remove Ethernet refclock setting
The Ethernet refclock configuration is board specific and should
not be harcoded in machine code.
Remove it to align with the imx6ul commit e87f3be1c7
("ARM: mach-imx:
imx6ul: remove not optional ethernet refclock overwrite").
Clearing bits 13 and 17 of GPR1 is the POR values, so this change
does not affect existing boards in mainline.
Tested on imx6sx-udoo-neo and imx6sx-sdb boards.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
parent
8400291e28
commit
9c26327ee7
@ -7,37 +7,15 @@
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "cpuidle.h"
|
||||
|
||||
static void __init imx6sx_enet_clk_sel(void)
|
||||
{
|
||||
struct regmap *gpr;
|
||||
|
||||
gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
|
||||
if (!IS_ERR(gpr)) {
|
||||
regmap_update_bits(gpr, IOMUXC_GPR1,
|
||||
IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);
|
||||
regmap_update_bits(gpr, IOMUXC_GPR1,
|
||||
IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0);
|
||||
} else {
|
||||
pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
|
||||
}
|
||||
}
|
||||
|
||||
static inline void imx6sx_enet_init(void)
|
||||
{
|
||||
imx6sx_enet_clk_sel();
|
||||
}
|
||||
|
||||
static void __init imx6sx_init_machine(void)
|
||||
{
|
||||
of_platform_default_populate(NULL, NULL, NULL);
|
||||
|
||||
imx6sx_enet_init();
|
||||
imx_anatop_init();
|
||||
imx6sx_pm_init();
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user