dmaengine: xilinx_dma: check for invalid vdma interleaved parameters
The VDMA HSIZE register (corresponding to sgl[0].size) is only 16bit wide / the VSIZE register (corresponding to numf) is only 13bit wide, so reject requests not fitting within that rather than silently transferring too little data. Signed-off-by: Peter Korsgaard <peter@korsgaard.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/20240105105956.1370220-1-peter@korsgaard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -112,7 +112,9 @@
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/* Register Direct Mode Registers */
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#define XILINX_DMA_REG_VSIZE 0x0000
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#define XILINX_DMA_VSIZE_MASK GENMASK(12, 0)
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#define XILINX_DMA_REG_HSIZE 0x0004
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#define XILINX_DMA_HSIZE_MASK GENMASK(15, 0)
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#define XILINX_DMA_REG_FRMDLY_STRIDE 0x0008
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#define XILINX_DMA_FRMDLY_STRIDE_FRMDLY_SHIFT 24
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@ -2050,6 +2052,10 @@ xilinx_vdma_dma_prep_interleaved(struct dma_chan *dchan,
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if (!xt->numf || !xt->sgl[0].size)
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return NULL;
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if (xt->numf & ~XILINX_DMA_VSIZE_MASK ||
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xt->sgl[0].size & ~XILINX_DMA_HSIZE_MASK)
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return NULL;
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if (xt->frame_size != 1)
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return NULL;
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