i2c: designware: do not hold SCL low when I2C_DYNAMIC_TAR_UPDATE is not set
When the Tx FIFO is empty and the last command has no STOP bit set, the master holds SCL low. If I2C_DYNAMIC_TAR_UPDATE is not set, BIT(13) MST_ON_HOLD of IC_RAW_INTR_STAT is not enabled, causing the __i2c_dw_disable() timeout. This is quite similar to commit2409205acd
("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low"). Also check BIT(7) MST_HOLD_TX_FIFO_EMPTY in IC_STATUS, which is available when IC_STAT_FOR_CLK_STRETCH is set. Fixes:2409205acd
("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low") Co-developed-by: Xiaowu Ding <xiaowu.ding@jaguarmicro.com> Signed-off-by: Xiaowu Ding <xiaowu.ding@jaguarmicro.com> Co-developed-by: Angus Chen <angus.chen@jaguarmicro.com> Signed-off-by: Angus Chen <angus.chen@jaguarmicro.com> Signed-off-by: Liu Peibao <loven.liu@jaguarmicro.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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drivers/i2c/busses
@ -524,7 +524,7 @@ err_release_lock:
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void __i2c_dw_disable(struct dw_i2c_dev *dev)
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{
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struct i2c_timings *t = &dev->timings;
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unsigned int raw_intr_stats;
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unsigned int raw_intr_stats, ic_stats;
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unsigned int enable;
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int timeout = 100;
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bool abort_needed;
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@ -532,9 +532,11 @@ void __i2c_dw_disable(struct dw_i2c_dev *dev)
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int ret;
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regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_intr_stats);
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regmap_read(dev->map, DW_IC_STATUS, &ic_stats);
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regmap_read(dev->map, DW_IC_ENABLE, &enable);
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abort_needed = raw_intr_stats & DW_IC_INTR_MST_ON_HOLD;
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abort_needed = (raw_intr_stats & DW_IC_INTR_MST_ON_HOLD) ||
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(ic_stats & DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY);
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if (abort_needed) {
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if (!(enable & DW_IC_ENABLE_ENABLE)) {
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regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE);
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@ -116,6 +116,7 @@
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#define DW_IC_STATUS_RFNE BIT(3)
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#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
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#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)
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#define DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY BIT(7)
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#define DW_IC_SDA_HOLD_RX_SHIFT 16
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#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, 16)
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