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cpufreq: intel_pstate: Make hwp_notify_lock a raw spinlock

notify_hwp_interrupt() is called via sysvec_thermal() ->
smp_thermal_vector() -> intel_thermal_interrupt() in hard irq context.
For this reason it must not use a simple spin_lock that sleeps with
PREEMPT_RT enabled. So convert it to a raw spinlock.

Reported-by: xiao sheng wen <atzlinux@sina.com>
Link: https://bugs.debian.org/1076483
Signed-off-by: Uwe Kleine-König <ukleinek@debian.org>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: xiao sheng wen <atzlinux@sina.com>
Link: https://patch.msgid.link/20240919081121.10784-2-ukleinek@debian.org
Cc: All applicable <stable@vger.kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Uwe Kleine-König 2024-09-19 10:11:21 +02:00 committed by Rafael J. Wysocki
parent 9852d85ec9
commit 8b4865cd90

View File

@ -1845,7 +1845,7 @@ static void intel_pstate_notify_work(struct work_struct *work)
wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_STATUS, 0); wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_STATUS, 0);
} }
static DEFINE_SPINLOCK(hwp_notify_lock); static DEFINE_RAW_SPINLOCK(hwp_notify_lock);
static cpumask_t hwp_intr_enable_mask; static cpumask_t hwp_intr_enable_mask;
#define HWP_GUARANTEED_PERF_CHANGE_STATUS BIT(0) #define HWP_GUARANTEED_PERF_CHANGE_STATUS BIT(0)
@ -1868,7 +1868,7 @@ void notify_hwp_interrupt(void)
if (!(value & status_mask)) if (!(value & status_mask))
return; return;
spin_lock_irqsave(&hwp_notify_lock, flags); raw_spin_lock_irqsave(&hwp_notify_lock, flags);
if (!cpumask_test_cpu(this_cpu, &hwp_intr_enable_mask)) if (!cpumask_test_cpu(this_cpu, &hwp_intr_enable_mask))
goto ack_intr; goto ack_intr;
@ -1876,13 +1876,13 @@ void notify_hwp_interrupt(void)
schedule_delayed_work(&all_cpu_data[this_cpu]->hwp_notify_work, schedule_delayed_work(&all_cpu_data[this_cpu]->hwp_notify_work,
msecs_to_jiffies(10)); msecs_to_jiffies(10));
spin_unlock_irqrestore(&hwp_notify_lock, flags); raw_spin_unlock_irqrestore(&hwp_notify_lock, flags);
return; return;
ack_intr: ack_intr:
wrmsrl_safe(MSR_HWP_STATUS, 0); wrmsrl_safe(MSR_HWP_STATUS, 0);
spin_unlock_irqrestore(&hwp_notify_lock, flags); raw_spin_unlock_irqrestore(&hwp_notify_lock, flags);
} }
static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata) static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata)
@ -1895,9 +1895,9 @@ static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata)
/* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */ /* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */
wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00); wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
spin_lock_irq(&hwp_notify_lock); raw_spin_lock_irq(&hwp_notify_lock);
cancel_work = cpumask_test_and_clear_cpu(cpudata->cpu, &hwp_intr_enable_mask); cancel_work = cpumask_test_and_clear_cpu(cpudata->cpu, &hwp_intr_enable_mask);
spin_unlock_irq(&hwp_notify_lock); raw_spin_unlock_irq(&hwp_notify_lock);
if (cancel_work) if (cancel_work)
cancel_delayed_work_sync(&cpudata->hwp_notify_work); cancel_delayed_work_sync(&cpudata->hwp_notify_work);
@ -1912,10 +1912,10 @@ static void intel_pstate_enable_hwp_interrupt(struct cpudata *cpudata)
if (boot_cpu_has(X86_FEATURE_HWP_NOTIFY)) { if (boot_cpu_has(X86_FEATURE_HWP_NOTIFY)) {
u64 interrupt_mask = HWP_GUARANTEED_PERF_CHANGE_REQ; u64 interrupt_mask = HWP_GUARANTEED_PERF_CHANGE_REQ;
spin_lock_irq(&hwp_notify_lock); raw_spin_lock_irq(&hwp_notify_lock);
INIT_DELAYED_WORK(&cpudata->hwp_notify_work, intel_pstate_notify_work); INIT_DELAYED_WORK(&cpudata->hwp_notify_work, intel_pstate_notify_work);
cpumask_set_cpu(cpudata->cpu, &hwp_intr_enable_mask); cpumask_set_cpu(cpudata->cpu, &hwp_intr_enable_mask);
spin_unlock_irq(&hwp_notify_lock); raw_spin_unlock_irq(&hwp_notify_lock);
if (cpu_feature_enabled(X86_FEATURE_HWP_HIGHEST_PERF_CHANGE)) if (cpu_feature_enabled(X86_FEATURE_HWP_HIGHEST_PERF_CHANGE))
interrupt_mask |= HWP_HIGHEST_PERF_CHANGE_REQ; interrupt_mask |= HWP_HIGHEST_PERF_CHANGE_REQ;