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arm64: dts: mediatek: mt8183: Add decoder

Add node for the hardware decoder present on the MT8183 SoC.

Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
Signed-off-by: Qianqian Yan <qianqian.yan@mediatek.com>
Signed-off-by: Frederic Chen <frederic.chen@mediatek.com>
Signed-off-by: Alexandre Courbot <acourbot@chromium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230630151436.155586-8-nfraprado@collabora.com
This commit is contained in:
Yunfei Dong 2023-06-30 11:14:13 -04:00 committed by AngeloGioacchino Del Regno
parent cacb3fdaf1
commit 89ce5a091b
No known key found for this signature in database
GPG Key ID: 9A3604CFAD978478

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@ -2019,6 +2019,36 @@
#clock-cells = <1>;
};
vcodec_dec: video-codec@16020000 {
compatible = "mediatek,mt8183-vcodec-dec";
reg = <0 0x16020000 0 0x1000>, /* VDEC_MISC */
<0 0x16021000 0 0x800>, /* VDEC_VLD */
<0 0x16021800 0 0x800>, /* VDEC_TOP */
<0 0x16022000 0 0x1000>, /* VDEC_MC */
<0 0x16023000 0 0x1000>, /* VDEC_AVCVLD */
<0 0x16024000 0 0x1000>, /* VDEC_AVCMV */
<0 0x16025000 0 0x1000>, /* VDEC_PP */
<0 0x16026800 0 0x800>, /* VP8_VD */
<0 0x16027000 0 0x800>, /* VP6_VD */
<0 0x16027800 0 0x800>, /* VP8_VL */
<0 0x16028400 0 0x400>; /* VP9_VD */
reg-names = "misc", "ld", "top", "cm", "ad", "av", "pp",
"hwd", "hwq", "hwb", "hwg";
interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_LOW>;
iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
<&iommu M4U_PORT_HW_VDEC_PP_EXT>,
<&iommu M4U_PORT_HW_VDEC_VLD_EXT>,
<&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>,
<&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>,
<&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>,
<&iommu M4U_PORT_HW_VDEC_PPWRAP_EXT>;
mediatek,scp = <&scp>;
mediatek,vdecsys = <&vdecsys>;
power-domains = <&spm MT8183_POWER_DOMAIN_VDEC>;
clocks = <&vdecsys CLK_VDEC_VDEC>;
clock-names = "vdec";
};
larb1: larb@16010000 {
compatible = "mediatek,mt8183-smi-larb";
reg = <0 0x16010000 0 0x1000>;