riscv: sched: defer restoring Vector context for user
User will use its Vector registers only after the kernel really returns to the userspace. So we can delay restoring Vector registers as long as we are still running in kernel mode. So, add a thread flag to indicates the need of restoring Vector and do the restore at the last arch-specific exit-to-user hook. This save the context restoring cost when we switch over multiple processes that run V in kernel mode. For example, if the kernel performs a context swicth from A->B->C, and returns to C's userspace, then there is no need to restore B's V-register. Besides, this also prevents us from repeatedly restoring V context when executing kernel-mode Vector multiple times. The cost of this is that we must disable preemption and mark vector as busy during vstate_{save,restore}. Because then the V context will not get restored back immediately when a trap-causing context switch happens in the middle of vstate_{save,restore}. Signed-off-by: Andy Chiu <andy.chiu@sifive.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Björn Töpel <bjorn@rivosinc.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20240115055929.4736-5-andy.chiu@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -4,6 +4,23 @@
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#define _ASM_RISCV_ENTRY_COMMON_H
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#define _ASM_RISCV_ENTRY_COMMON_H
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#include <asm/stacktrace.h>
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#include <asm/stacktrace.h>
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#include <asm/thread_info.h>
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#include <asm/vector.h>
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static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
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unsigned long ti_work)
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{
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if (ti_work & _TIF_RISCV_V_DEFER_RESTORE) {
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clear_thread_flag(TIF_RISCV_V_DEFER_RESTORE);
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/*
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* We are already called with irq disabled, so go without
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* keeping track of riscv_v_flags.
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*/
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riscv_v_vstate_restore(current, regs);
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}
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}
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#define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare
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void handle_page_fault(struct pt_regs *regs);
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void handle_page_fault(struct pt_regs *regs);
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void handle_break(struct pt_regs *regs);
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void handle_break(struct pt_regs *regs);
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@ -103,12 +103,14 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
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#define TIF_NOTIFY_SIGNAL 9 /* signal notifications exist */
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#define TIF_NOTIFY_SIGNAL 9 /* signal notifications exist */
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#define TIF_UPROBE 10 /* uprobe breakpoint or singlestep */
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#define TIF_UPROBE 10 /* uprobe breakpoint or singlestep */
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#define TIF_32BIT 11 /* compat-mode 32bit process */
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#define TIF_32BIT 11 /* compat-mode 32bit process */
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#define TIF_RISCV_V_DEFER_RESTORE 12 /* restore Vector before returing to user */
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#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
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#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
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#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
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#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
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#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
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#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
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#define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL)
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#define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL)
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#define _TIF_UPROBE (1 << TIF_UPROBE)
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#define _TIF_UPROBE (1 << TIF_UPROBE)
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#define _TIF_RISCV_V_DEFER_RESTORE (1 << TIF_RISCV_V_DEFER_RESTORE)
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#define _TIF_WORK_MASK \
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#define _TIF_WORK_MASK \
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(_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NEED_RESCHED | \
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(_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NEED_RESCHED | \
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@ -193,6 +193,15 @@ static inline void riscv_v_vstate_restore(struct task_struct *task,
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}
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}
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}
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}
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static inline void riscv_v_vstate_set_restore(struct task_struct *task,
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struct pt_regs *regs)
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{
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if ((regs->status & SR_VS) != SR_VS_OFF) {
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set_tsk_thread_flag(task, TIF_RISCV_V_DEFER_RESTORE);
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riscv_v_vstate_on(regs);
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}
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}
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static inline void __switch_to_vector(struct task_struct *prev,
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static inline void __switch_to_vector(struct task_struct *prev,
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struct task_struct *next)
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struct task_struct *next)
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{
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{
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@ -200,7 +209,7 @@ static inline void __switch_to_vector(struct task_struct *prev,
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regs = task_pt_regs(prev);
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regs = task_pt_regs(prev);
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riscv_v_vstate_save(prev, regs);
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riscv_v_vstate_save(prev, regs);
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riscv_v_vstate_restore(next, task_pt_regs(next));
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riscv_v_vstate_set_restore(next, task_pt_regs(next));
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}
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}
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void riscv_v_vstate_ctrl_init(struct task_struct *tsk);
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void riscv_v_vstate_ctrl_init(struct task_struct *tsk);
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@ -117,7 +117,7 @@ void kernel_vector_end(void)
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if (WARN_ON(!has_vector()))
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if (WARN_ON(!has_vector()))
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return;
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return;
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riscv_v_vstate_restore(current, task_pt_regs(current));
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riscv_v_vstate_set_restore(current, task_pt_regs(current));
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riscv_v_disable();
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riscv_v_disable();
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@ -171,6 +171,7 @@ void flush_thread(void)
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riscv_v_vstate_off(task_pt_regs(current));
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riscv_v_vstate_off(task_pt_regs(current));
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kfree(current->thread.vstate.datap);
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kfree(current->thread.vstate.datap);
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memset(¤t->thread.vstate, 0, sizeof(struct __riscv_v_ext_state));
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memset(¤t->thread.vstate, 0, sizeof(struct __riscv_v_ext_state));
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clear_tsk_thread_flag(current, TIF_RISCV_V_DEFER_RESTORE);
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#endif
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#endif
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}
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}
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@ -187,6 +188,7 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
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*dst = *src;
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*dst = *src;
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/* clear entire V context, including datap for a new task */
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/* clear entire V context, including datap for a new task */
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memset(&dst->thread.vstate, 0, sizeof(struct __riscv_v_ext_state));
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memset(&dst->thread.vstate, 0, sizeof(struct __riscv_v_ext_state));
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clear_tsk_thread_flag(dst, TIF_RISCV_V_DEFER_RESTORE);
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return 0;
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return 0;
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}
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}
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@ -99,8 +99,11 @@ static int riscv_vr_get(struct task_struct *target,
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* Ensure the vector registers have been saved to the memory before
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* Ensure the vector registers have been saved to the memory before
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* copying them to membuf.
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* copying them to membuf.
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*/
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*/
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if (target == current)
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if (target == current) {
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get_cpu_vector_context();
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riscv_v_vstate_save(current, task_pt_regs(current));
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riscv_v_vstate_save(current, task_pt_regs(current));
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put_cpu_vector_context();
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}
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ptrace_vstate.vstart = vstate->vstart;
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ptrace_vstate.vstart = vstate->vstart;
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ptrace_vstate.vl = vstate->vl;
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ptrace_vstate.vl = vstate->vl;
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@ -86,7 +86,10 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec)
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/* datap is designed to be 16 byte aligned for better performance */
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/* datap is designed to be 16 byte aligned for better performance */
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WARN_ON(unlikely(!IS_ALIGNED((unsigned long)datap, 16)));
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WARN_ON(unlikely(!IS_ALIGNED((unsigned long)datap, 16)));
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get_cpu_vector_context();
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riscv_v_vstate_save(current, regs);
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riscv_v_vstate_save(current, regs);
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put_cpu_vector_context();
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/* Copy everything of vstate but datap. */
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/* Copy everything of vstate but datap. */
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err = __copy_to_user(&state->v_state, ¤t->thread.vstate,
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err = __copy_to_user(&state->v_state, ¤t->thread.vstate,
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offsetof(struct __riscv_v_ext_state, datap));
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offsetof(struct __riscv_v_ext_state, datap));
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@ -134,7 +137,7 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec)
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if (unlikely(err))
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if (unlikely(err))
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return err;
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return err;
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riscv_v_vstate_restore(current, regs);
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riscv_v_vstate_set_restore(current, regs);
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return err;
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return err;
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}
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}
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@ -167,7 +167,7 @@ bool riscv_v_first_use_handler(struct pt_regs *regs)
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return true;
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return true;
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}
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}
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riscv_v_vstate_on(regs);
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riscv_v_vstate_on(regs);
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riscv_v_vstate_restore(current, regs);
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riscv_v_vstate_set_restore(current, regs);
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return true;
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return true;
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}
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}
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