ARM: dts: stm32: stm32mp151a-prtt1l: Fix QSPI configuration
Rename 'pins1' to 'pins' in the qspi_bk1_pins_a node to correct the subnode name. The incorrect name caused the configuration to be applied to the wrong subnode, resulting in QSPI not working properly. Some additional changes was made: - To avoid this kind of regression, all references to pin configuration nodes are now referenced directly using the format &{label/subnode}. - /delete-property/ bias-disable; was added everywhere where bias-pull-up is used - redundant properties like driver-push-pull are removed Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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@ -28,17 +28,13 @@
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};
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};
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&pwm5_pins_a {
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pins {
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&{pwm5_pins_a/pins} {
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pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */
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};
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};
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&pwm5_sleep_pins_a {
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pins {
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&{pwm5_sleep_pins_a/pins} {
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pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* TIM5_CH1 */
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};
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};
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&timers5 {
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status = "okay";
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@ -168,27 +168,22 @@
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status = "okay";
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};
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&sdmmc2_b4_od_pins_a {
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pins1 {
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&{sdmmc2_b4_od_pins_a/pins1} {
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pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
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<STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
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<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
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<STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
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};
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};
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&sdmmc2_b4_pins_a {
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pins1 {
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&{sdmmc2_b4_pins_a/pins1} {
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pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
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<STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
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<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
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<STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
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<STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
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};
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};
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&sdmmc2_b4_sleep_pins_a {
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pins {
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&{sdmmc2_b4_sleep_pins_a/pins} {
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pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
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<STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */
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<STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
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@ -196,25 +191,20 @@
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<STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
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<STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
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};
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};
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&sdmmc2_d47_pins_a {
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pins {
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&{sdmmc2_d47_pins_a/pins} {
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pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
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<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
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<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
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<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
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};
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};
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&sdmmc2_d47_sleep_pins_a {
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pins {
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&{sdmmc2_d47_sleep_pins_a/pins} {
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pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
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<STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
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<STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
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<STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
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};
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};
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&sdmmc3 {
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pinctrl-names = "default", "opendrain", "sleep";
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@ -238,27 +228,22 @@
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};
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};
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&sdmmc3_b4_od_pins_b {
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pins1 {
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&{sdmmc3_b4_od_pins_b/pins1} {
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pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
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<STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
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<STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
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<STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
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};
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};
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&sdmmc3_b4_pins_b {
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pins1 {
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&{sdmmc3_b4_pins_b/pins1} {
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pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
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<STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
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<STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
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<STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
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<STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
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};
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};
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&sdmmc3_b4_sleep_pins_b {
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pins {
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&{sdmmc3_b4_sleep_pins_b/pins} {
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pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */
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<STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */
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<STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
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@ -266,7 +251,6 @@
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<STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
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<STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
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};
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};
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&spi1 {
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pinctrl-0 = <&spi1_pins_b>;
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@ -69,22 +69,20 @@
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status = "okay";
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};
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ðernet0_rmii_pins_a {
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pins1 {
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&{ethernet0_rmii_pins_a/pins1} {
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pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
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<STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
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<STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
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};
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pins2 {
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&{ethernet0_rmii_pins_a/pins2} {
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pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
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<STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
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<STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK input */
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<STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
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};
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};
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ðernet0_rmii_sleep_pins_a {
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pins1 {
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&{ethernet0_rmii_sleep_pins_a/pins1} {
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pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */
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<STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */
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<STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
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@ -93,7 +91,6 @@
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<STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
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<STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
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};
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};
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&iwdg2 {
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status = "okay";
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@ -122,13 +119,12 @@
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};
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};
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&qspi_bk1_pins_a {
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pins1 {
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&{qspi_bk1_pins_a/pins} {
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/delete-property/ bias-disable;
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bias-pull-up;
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drive-push-pull;
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slew-rate = <1>;
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};
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};
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&rng1 {
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status = "okay";
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@ -147,22 +143,24 @@
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status = "okay";
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};
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&sdmmc1_b4_od_pins_a {
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pins1 {
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&{sdmmc1_b4_od_pins_a/pins1} {
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/delete-property/ bias-disable;
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bias-pull-up;
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};
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pins2 {
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bias-pull-up;
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};
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};
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&sdmmc1_b4_pins_a {
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pins1 {
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&{sdmmc1_b4_od_pins_a/pins2} {
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/delete-property/ bias-disable;
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bias-pull-up;
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};
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pins2 {
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&{sdmmc1_b4_pins_a/pins1} {
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/delete-property/ bias-disable;
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bias-pull-up;
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};
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&{sdmmc1_b4_pins_a/pins2} {
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/delete-property/ bias-disable;
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bias-pull-up;
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};
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&uart4 {
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@ -175,35 +173,31 @@
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status = "okay";
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};
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&uart4_idle_pins_a {
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pins1 {
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&{uart4_idle_pins_a/pins1} {
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pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
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};
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pins2 {
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&{uart4_idle_pins_a/pins2} {
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pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
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/delete-property/ bias-disable;
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bias-pull-up;
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};
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};
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&uart4_pins_a {
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pins1 {
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&{uart4_pins_a/pins1} {
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pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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&{uart4_pins_a/pins2} {
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pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
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/delete-property/ bias-disable;
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bias-pull-up;
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};
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};
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&uart4_sleep_pins_a {
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pins {
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&{uart4_sleep_pins_a/pins} {
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pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
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<STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
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};
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};
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&usbh_ehci {
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status = "okay";
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@ -36,19 +36,15 @@
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};
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};
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&i2c1_pins_a {
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pins {
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&{i2c1_pins_a/pins} {
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pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
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<STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */
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};
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};
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&i2c1_sleep_pins_a {
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pins {
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&{i2c1_sleep_pins_a/pins} {
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pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
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<STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */
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};
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};
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&mdio0 {
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/* TI DP83TD510E */
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