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ARM: dts: stm32: stm32mp151a-prtt1l: Fix QSPI configuration

Rename 'pins1' to 'pins' in the qspi_bk1_pins_a node to correct the
subnode name. The incorrect name caused the configuration to be
applied to the wrong subnode, resulting in QSPI not working properly.

Some additional changes was made:
- To avoid this kind of regression, all references to pin configuration
  nodes are now referenced directly using the format &{label/subnode}.
- /delete-property/ bias-disable; was added everywhere where bias-pull-up
  is used
- redundant properties like driver-push-pull are removed

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Oleksij Rempel 2024-08-12 12:41:42 +02:00 committed by Alexandre Torgue
parent 9d4de04f61
commit 7de129f538
4 changed files with 116 additions and 146 deletions

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@ -28,16 +28,12 @@
}; };
}; };
&pwm5_pins_a { &{pwm5_pins_a/pins} {
pins {
pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */ pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */
};
}; };
&pwm5_sleep_pins_a { &{pwm5_sleep_pins_a/pins} {
pins {
pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* TIM5_CH1 */ pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* TIM5_CH1 */
};
}; };
&timers5 { &timers5 {

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@ -168,52 +168,42 @@
status = "okay"; status = "okay";
}; };
&sdmmc2_b4_od_pins_a { &{sdmmc2_b4_od_pins_a/pins1} {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
};
}; };
&sdmmc2_b4_pins_a { &{sdmmc2_b4_pins_a/pins1} {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
<STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
};
}; };
&sdmmc2_b4_sleep_pins_a { &{sdmmc2_b4_sleep_pins_a/pins} {
pins {
pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */ <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
<STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
<STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
};
}; };
&sdmmc2_d47_pins_a { &{sdmmc2_d47_pins_a/pins} {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
};
}; };
&sdmmc2_d47_sleep_pins_a { &{sdmmc2_d47_sleep_pins_a/pins} {
pins {
pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
<STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */ <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
};
}; };
&sdmmc3 { &sdmmc3 {
@ -238,34 +228,28 @@
}; };
}; };
&sdmmc3_b4_od_pins_b { &{sdmmc3_b4_od_pins_b/pins1} {
pins1 {
pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
<STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
<STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
<STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
};
}; };
&sdmmc3_b4_pins_b { &{sdmmc3_b4_pins_b/pins1} {
pins1 {
pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
<STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
<STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
<STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
<STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
};
}; };
&sdmmc3_b4_sleep_pins_b { &{sdmmc3_b4_sleep_pins_b/pins} {
pins {
pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */ pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */
<STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */ <STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */
<STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */ <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
<STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
<STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
<STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */ <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
};
}; };
&spi1 { &spi1 {

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@ -69,22 +69,20 @@
status = "okay"; status = "okay";
}; };
&ethernet0_rmii_pins_a { &{ethernet0_rmii_pins_a/pins1} {
pins1 {
pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */ pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
<STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */ <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
<STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */ <STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
}; };
pins2 {
&{ethernet0_rmii_pins_a/pins2} {
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
<STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
<STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK input */ <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK input */
<STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
};
}; };
&ethernet0_rmii_sleep_pins_a { &{ethernet0_rmii_sleep_pins_a/pins1} {
pins1 {
pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */ pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */
<STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */ <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
@ -92,7 +90,6 @@
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
<STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
};
}; };
&iwdg2 { &iwdg2 {
@ -122,12 +119,11 @@
}; };
}; };
&qspi_bk1_pins_a { &{qspi_bk1_pins_a/pins} {
pins1 { /delete-property/ bias-disable;
bias-pull-up; bias-pull-up;
drive-push-pull; drive-push-pull;
slew-rate = <1>; slew-rate = <1>;
};
}; };
&rng1 { &rng1 {
@ -147,22 +143,24 @@
status = "okay"; status = "okay";
}; };
&sdmmc1_b4_od_pins_a { &{sdmmc1_b4_od_pins_a/pins1} {
pins1 { /delete-property/ bias-disable;
bias-pull-up; bias-pull-up;
};
pins2 {
bias-pull-up;
};
}; };
&sdmmc1_b4_pins_a { &{sdmmc1_b4_od_pins_a/pins2} {
pins1 { /delete-property/ bias-disable;
bias-pull-up; bias-pull-up;
}; };
pins2 {
&{sdmmc1_b4_pins_a/pins1} {
/delete-property/ bias-disable;
bias-pull-up;
};
&{sdmmc1_b4_pins_a/pins2} {
/delete-property/ bias-disable;
bias-pull-up; bias-pull-up;
};
}; };
&uart4 { &uart4 {
@ -175,34 +173,30 @@
status = "okay"; status = "okay";
}; };
&uart4_idle_pins_a { &{uart4_idle_pins_a/pins1} {
pins1 {
pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */ pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
};
pins2 {
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
bias-pull-up;
};
}; };
&uart4_pins_a { &{uart4_idle_pins_a/pins2} {
pins1 { pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
/delete-property/ bias-disable;
bias-pull-up;
};
&{uart4_pins_a/pins1} {
pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */ pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>; slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
bias-pull-up;
};
}; };
&uart4_sleep_pins_a { &{uart4_pins_a/pins2} {
pins { pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
/delete-property/ bias-disable;
bias-pull-up;
};
&{uart4_sleep_pins_a/pins} {
pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */ pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
<STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */ <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
};
}; };
&usbh_ehci { &usbh_ehci {

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@ -36,18 +36,14 @@
}; };
}; };
&i2c1_pins_a { &{i2c1_pins_a/pins} {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
<STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */ <STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */
};
}; };
&i2c1_sleep_pins_a { &{i2c1_sleep_pins_a/pins} {
pins {
pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
<STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */ <STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */
};
}; };
&mdio0 { &mdio0 {