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watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks

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On RZ/Five SoC it was observed that setting timeout (to say 1 sec) wouldn't
reset the system.

The procedure described in the HW manual (Procedure for Activating Modules)
for activating the target module states we need to start supply of the
clock module before applying the reset signal. This patch makes sure we
follow the same procedure to clear the registers of the WDT module, fixing
the issues seen on RZ/Five SoC.

While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as it has
the same function calls.

Fixes: 4055ee8100 ("watchdog: rzg2l_wdt: Add set_timeout callback")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221117114907.138583-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This commit is contained in:
Lad Prabhakar 2022-11-17 11:49:06 +00:00 committed by Wim Van Sebroeck
parent e9651838fe
commit 6ba6f0f591
1 changed files with 4 additions and 6 deletions
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10
drivers/watchdog/rzg2l_wdt.c
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@ -115,25 +115,23 @@ static int rzg2l_wdt_stop(struct watchdog_device *wdev)
{
struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
pm_runtime_put(wdev->parent);
reset_control_reset(priv->rstc);
pm_runtime_put(wdev->parent);
return 0;
}
static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev, unsigned int timeout)
{
struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
wdev->timeout = timeout;
/*
* If the watchdog is active, reset the module for updating the WDTSET
* register so that it is updated with new timeout values.
* register by calling rzg2l_wdt_stop() (which internally calls reset_control_reset()
* to reset the module) so that it is updated with new timeout values.
*/
if (watchdog_active(wdev)) {
pm_runtime_put(wdev->parent);
reset_control_reset(priv->rstc);
rzg2l_wdt_stop(wdev);
rzg2l_wdt_start(wdev);
}