cpufreq: ti-cpufreq: Use socinfo to get revision in AM62 family
In the AM62x, AM62Ax, and AM62Px devices, we already have the revision info within the k3-socinfo driver. Hence, re-use this information from there instead of re using the offset for 2 drivers trying to get the same information ie. revision. Signed-off-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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@ -16,6 +16,7 @@
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#include <linux/pm_opp.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#define REVISION_MASK 0xF
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#define REVISION_SHIFT 28
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@ -303,6 +304,13 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
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.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
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};
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static const struct soc_device_attribute k3_cpufreq_soc[] = {
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{ .family = "AM62X", .revision = "SR1.0" },
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{ .family = "AM62AX", .revision = "SR1.0" },
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{ .family = "AM62PX", .revision = "SR1.0" },
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{ /* sentinel */ }
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};
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static struct ti_cpufreq_soc_data am625_soc_data = {
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.efuse_xlate = am625_efuse_xlate,
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.efuse_offset = 0x0018,
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@ -384,6 +392,16 @@ static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
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struct device *dev = opp_data->cpu_dev;
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u32 revision;
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int ret;
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if (soc_device_match(k3_cpufreq_soc)) {
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/*
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* Since the SR is 1.0, hard code the revision_value as
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* 0x1 here. This way we avoid re using the same register
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* that is giving us required information inside socinfo
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* anyway.
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*/
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*revision_value = 0x1;
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goto done;
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}
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ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
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&revision);
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@ -406,6 +424,7 @@ static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
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*revision_value = BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
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done:
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return 0;
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}
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