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misc: rtsx: add to support new card reader rts5264

in order to support rts5264 in rtsx_pcr add the id in and
determine whether the device is rts5264 to call rts5264
functions and do rts5264 workflows or set rts5264 registers

Signed-off-by: Ricky Wu <ricky_wu@realtek.com>
Link: https://lore.kernel.org/r/20231208032145.2143580-3-ricky_wu@realtek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ricky Wu 2023-12-08 11:21:44 +08:00 committed by Greg Kroah-Hartman
parent c27dfca455
commit 6a511c9b3a
2 changed files with 26 additions and 5 deletions

View File

@ -26,6 +26,7 @@
#include "rtsx_pcr.h" #include "rtsx_pcr.h"
#include "rts5261.h" #include "rts5261.h"
#include "rts5228.h" #include "rts5228.h"
#include "rts5264.h"
static bool msi_en = true; static bool msi_en = true;
module_param(msi_en, bool, S_IRUGO | S_IWUSR); module_param(msi_en, bool, S_IRUGO | S_IWUSR);
@ -54,6 +55,7 @@ static const struct pci_device_id rtsx_pci_ids[] = {
{ PCI_DEVICE(0x10EC, 0x5260), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5260), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5261), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5261), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5228), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5228), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5264), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ 0, } { 0, }
}; };
@ -714,6 +716,9 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
if (PCI_PID(pcr) == PID_5228) if (PCI_PID(pcr) == PID_5228)
return rts5228_pci_switch_clock(pcr, card_clock, return rts5228_pci_switch_clock(pcr, card_clock,
ssc_depth, initial_mode, double_clk, vpclk); ssc_depth, initial_mode, double_clk, vpclk);
if (PCI_PID(pcr) == PID_5264)
return rts5264_pci_switch_clock(pcr, card_clock,
ssc_depth, initial_mode, double_clk, vpclk);
if (initial_mode) { if (initial_mode) {
/* We use 250k(around) here, in initial stage */ /* We use 250k(around) here, in initial stage */
@ -987,7 +992,8 @@ static irqreturn_t rtsx_pci_isr(int irq, void *dev_id)
int_reg &= (pcr->bier | 0x7FFFFF); int_reg &= (pcr->bier | 0x7FFFFF);
if (int_reg & SD_OC_INT) if ((int_reg & SD_OC_INT) ||
((int_reg & SD_OVP_INT) && (PCI_PID(pcr) == PID_5264)))
rtsx_pci_process_ocp_interrupt(pcr); rtsx_pci_process_ocp_interrupt(pcr);
if (int_reg & SD_INT) { if (int_reg & SD_INT) {
@ -1159,7 +1165,9 @@ void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr)
{ {
u16 val; u16 val;
if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { if ((PCI_PID(pcr) != PID_525A) &&
(PCI_PID(pcr) != PID_5260) &&
(PCI_PID(pcr) != PID_5264)) {
rtsx_pci_read_phy_register(pcr, 0x01, &val); rtsx_pci_read_phy_register(pcr, 0x01, &val);
val |= 1<<9; val |= 1<<9;
rtsx_pci_write_phy_register(pcr, 0x01, val); rtsx_pci_write_phy_register(pcr, 0x01, val);
@ -1175,7 +1183,9 @@ void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr)
{ {
u16 val; u16 val;
if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { if ((PCI_PID(pcr) != PID_525A) &&
(PCI_PID(pcr) != PID_5260) &&
(PCI_PID(pcr) != PID_5264)) {
rtsx_pci_read_phy_register(pcr, 0x01, &val); rtsx_pci_read_phy_register(pcr, 0x01, &val);
val &= ~(1<<9); val &= ~(1<<9);
rtsx_pci_write_phy_register(pcr, 0x01, val); rtsx_pci_write_phy_register(pcr, 0x01, val);
@ -1226,7 +1236,7 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
rtsx_pci_enable_bus_int(pcr); rtsx_pci_enable_bus_int(pcr);
/* Power on SSC */ /* Power on SSC */
if (PCI_PID(pcr) == PID_5261) { if ((PCI_PID(pcr) == PID_5261) || (PCI_PID(pcr) == PID_5264)) {
/* Gating real mcu clock */ /* Gating real mcu clock */
err = rtsx_pci_write_register(pcr, RTS5261_FW_CFG1, err = rtsx_pci_write_register(pcr, RTS5261_FW_CFG1,
RTS5261_MCU_CLOCK_GATING, 0); RTS5261_MCU_CLOCK_GATING, 0);
@ -1270,6 +1280,11 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
else if (PCI_PID(pcr) == PID_5228) else if (PCI_PID(pcr) == PID_5228)
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF,
RTS5228_SSC_DEPTH_2M); RTS5228_SSC_DEPTH_2M);
else if (is_version(pcr, 0x5264, IC_VER_A))
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
else if (PCI_PID(pcr) == PID_5264)
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF,
RTS5264_SSC_DEPTH_2M);
else else
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12);
@ -1305,6 +1320,7 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
case PID_5260: case PID_5260:
case PID_5261: case PID_5261:
case PID_5228: case PID_5228:
case PID_5264:
rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 1, 1); rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 1, 1);
break; break;
default: default:
@ -1404,6 +1420,10 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
case 0x5228: case 0x5228:
rts5228_init_params(pcr); rts5228_init_params(pcr);
break; break;
case 0x5264:
rts5264_init_params(pcr);
break;
} }
pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n",
@ -1544,7 +1564,7 @@ static int rtsx_pci_probe(struct pci_dev *pcidev,
pcr->pci = pcidev; pcr->pci = pcidev;
dev_set_drvdata(&pcidev->dev, handle); dev_set_drvdata(&pcidev->dev, handle);
if (CHK_PCI_PID(pcr, 0x525A)) if ((CHK_PCI_PID(pcr, 0x525A)) || (CHK_PCI_PID(pcr, 0x5264)))
bar = 1; bar = 1;
len = pci_resource_len(pcidev, bar); len = pci_resource_len(pcidev, bar);
base = pci_resource_start(pcidev, bar); base = pci_resource_start(pcidev, bar);

View File

@ -74,6 +74,7 @@ void rtl8411b_init_params(struct rtsx_pcr *pcr);
void rts5260_init_params(struct rtsx_pcr *pcr); void rts5260_init_params(struct rtsx_pcr *pcr);
void rts5261_init_params(struct rtsx_pcr *pcr); void rts5261_init_params(struct rtsx_pcr *pcr);
void rts5228_init_params(struct rtsx_pcr *pcr); void rts5228_init_params(struct rtsx_pcr *pcr);
void rts5264_init_params(struct rtsx_pcr *pcr);
static inline u8 map_sd_drive(int idx) static inline u8 map_sd_drive(int idx)
{ {