dt-bindings: watchdog: aspeed,ast2400-wdt: Convert to DT schema
Squash warnings such as: ``` arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: /ahb/apb@1e600000/watchdog@1e785000: failed to match any schema with compatible: ['aspeed,ast2400-wdt'] ``` The schema binding additionally defines the clocks property over the prose binding to align with use of the node in the DTS files. Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240403020439.418788-1-andrew@codeconstruct.com.au Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
Andrew Jeffery
Rob Herring (Arm)
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/aspeed,ast2400-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Aspeed watchdog timer controllers
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maintainers:
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- Andrew Jeffery <andrew@codeconstruct.com.au>
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properties:
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compatible:
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enum:
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- aspeed,ast2400-wdt
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- aspeed,ast2500-wdt
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- aspeed,ast2600-wdt
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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description: >
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The clock used to drive the watchdog counter. From the AST2500 no source
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other than the 1MHz clock can be selected, so the clocks property is
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optional.
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aspeed,reset-type:
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$ref: /schemas/types.yaml#/definitions/string
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enum:
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- cpu
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- soc
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- system
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- none
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default: system
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description: >
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The watchdog can be programmed to generate one of three different types of
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reset when a timeout occcurs.
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Specifying 'cpu' will only reset the processor on a timeout event.
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Specifying 'soc' will reset a configurable subset of the SoC's controllers
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on a timeout event. Controllers critical to the SoC's operation may remain
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untouched. The set of SoC controllers to reset may be specified via the
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aspeed,reset-mask property if the node has the aspeed,ast2500-wdt or
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aspeed,ast2600-wdt compatible.
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Specifying 'system' will reset all controllers on a timeout event, as if
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EXTRST had been asserted.
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Specifying 'none' will cause the timeout event to have no reset effect.
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Another watchdog engine on the chip must be used for chip reset operations.
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aspeed,alt-boot:
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$ref: /schemas/types.yaml#/definitions/flag
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description: >
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Direct the watchdog to configure the SoC to boot from the alternative boot
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region if a timeout occurs.
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aspeed,external-signal:
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$ref: /schemas/types.yaml#/definitions/flag
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description: >
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Assert the timeout event on an external signal pin associated with the
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watchdog controller instance. The pin must be muxed appropriately.
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aspeed,ext-pulse-duration:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: >
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The duration, in microseconds, of the pulse emitted on the external signal
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pin.
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aspeed,ext-push-pull:
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$ref: /schemas/types.yaml#/definitions/flag
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description: >
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If aspeed,external-signal is specified in the node, set the external
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signal pin's drive type to push-pull. If aspeed,ext-push-pull is not
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specified then the pin is configured as open-drain.
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aspeed,ext-active-high:
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$ref: /schemas/types.yaml#/definitions/flag
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description: >
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If both aspeed,external-signal and aspeed,ext-push-pull are specified in
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the node, set the pulse polarity to active-high. If aspeed,ext-active-high
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is not specified then the pin is configured as active-low.
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aspeed,reset-mask:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 1
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maxItems: 2
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description: >
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A bitmask indicating which peripherals will be reset if the watchdog
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timer expires. On AST2500 SoCs this should be a single word defined using
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the AST2500_WDT_RESET_* macros; on AST2600 SoCs this should be a two-word
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array with the first word defined using the AST2600_WDT_RESET1_* macros,
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and the second word defined using the AST2600_WDT_RESET2_* macros.
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required:
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- compatible
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- reg
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allOf:
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- if:
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anyOf:
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- required:
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- aspeed,ext-push-pull
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- required:
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- aspeed,ext-active-high
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- required:
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- aspeed,reset-mask
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then:
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properties:
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compatible:
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enum:
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- aspeed,ast2500-wdt
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- aspeed,ast2600-wdt
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- if:
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required:
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- aspeed,ext-active-high
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then:
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required:
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- aspeed,ext-push-pull
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additionalProperties: false
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examples:
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- |
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watchdog@1e785000 {
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compatible = "aspeed,ast2400-wdt";
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reg = <0x1e785000 0x1c>;
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aspeed,reset-type = "system";
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aspeed,external-signal;
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};
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- |
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#include <dt-bindings/watchdog/aspeed-wdt.h>
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watchdog@1e785040 {
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compatible = "aspeed,ast2600-wdt";
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reg = <0x1e785040 0x40>;
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aspeed,reset-type = "soc";
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aspeed,reset-mask = <AST2600_WDT_RESET1_DEFAULT
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(AST2600_WDT_RESET2_DEFAULT & ~AST2600_WDT_RESET2_LPC)>;
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};
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@ -1,73 +0,0 @@
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Aspeed Watchdog Timer
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Required properties:
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- compatible: must be one of:
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- "aspeed,ast2400-wdt"
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- "aspeed,ast2500-wdt"
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- "aspeed,ast2600-wdt"
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- reg: physical base address of the controller and length of memory mapped
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region
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Optional properties:
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- aspeed,reset-type = "cpu|soc|system|none"
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Reset behavior - Whenever a timeout occurs the watchdog can be programmed
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to generate one of three different, mutually exclusive, types of resets.
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Type "none" can be specified to indicate that no resets are to be done.
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This is useful in situations where another watchdog engine on chip is
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to perform the reset.
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If 'aspeed,reset-type=' is not specified the default is to enable system
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reset.
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Reset types:
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- cpu: Reset CPU on watchdog timeout
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- soc: Reset 'System on Chip' on watchdog timeout
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- system: Reset system on watchdog timeout
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- none: No reset is performed on timeout. Assumes another watchdog
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engine is responsible for this.
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- aspeed,alt-boot: If property is present then boot from alternate block.
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- aspeed,external-signal: If property is present then signal is sent to
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external reset counter (only WDT1 and WDT2). If not
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specified no external signal is sent.
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- aspeed,ext-pulse-duration: External signal pulse duration in microseconds
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Optional properties for AST2500-compatible watchdogs:
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- aspeed,ext-push-pull: If aspeed,external-signal is present, set the pin's
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drive type to push-pull. The default is open-drain.
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- aspeed,ext-active-high: If aspeed,external-signal is present and and the pin
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is configured as push-pull, then set the pulse
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polarity to active-high. The default is active-low.
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Optional properties for AST2500- and AST2600-compatible watchdogs:
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- aspeed,reset-mask: A bitmask indicating which peripherals will be reset if
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the watchdog timer expires. On AST2500 this should be a
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single word defined using the AST2500_WDT_RESET_* macros;
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on AST2600 this should be a two-word array with the first
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word defined using the AST2600_WDT_RESET1_* macros and the
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second word defined using the AST2600_WDT_RESET2_* macros.
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Examples:
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wdt1: watchdog@1e785000 {
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compatible = "aspeed,ast2400-wdt";
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reg = <0x1e785000 0x1c>;
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aspeed,reset-type = "system";
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aspeed,external-signal;
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};
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#include <dt-bindings/watchdog/aspeed-wdt.h>
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wdt2: watchdog@1e785040 {
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compatible = "aspeed,ast2600-wdt";
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reg = <0x1e785040 0x40>;
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aspeed,reset-mask = <AST2600_WDT_RESET1_DEFAULT
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(AST2600_WDT_RESET2_DEFAULT & ~AST2600_WDT_RESET2_LPC)>;
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};
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