1

mmc: Merge branch fixes into next

Merge the mmc fixes for v6.10-rc[n] into the next branch, to allow them to
get tested together with the new mmc changes that are targeted for v6.11.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Ulf Hansson 2024-06-20 10:59:39 +02:00
commit 623c6d5ec5
4 changed files with 76 additions and 58 deletions

View File

@ -131,10 +131,12 @@ struct moxart_host {
struct dma_async_tx_descriptor *tx_desc; struct dma_async_tx_descriptor *tx_desc;
struct mmc_host *mmc; struct mmc_host *mmc;
struct mmc_request *mrq; struct mmc_request *mrq;
struct scatterlist *cur_sg;
struct completion dma_complete; struct completion dma_complete;
struct completion pio_complete; struct completion pio_complete;
struct sg_mapping_iter sg_miter; u32 num_sg;
u32 data_remain;
u32 data_len; u32 data_len;
u32 fifo_width; u32 fifo_width;
u32 timeout; u32 timeout;
@ -146,6 +148,35 @@ struct moxart_host {
bool is_removed; bool is_removed;
}; };
static inline void moxart_init_sg(struct moxart_host *host,
struct mmc_data *data)
{
host->cur_sg = data->sg;
host->num_sg = data->sg_len;
host->data_remain = host->cur_sg->length;
if (host->data_remain > host->data_len)
host->data_remain = host->data_len;
}
static inline int moxart_next_sg(struct moxart_host *host)
{
int remain;
struct mmc_data *data = host->mrq->cmd->data;
host->cur_sg++;
host->num_sg--;
if (host->num_sg > 0) {
host->data_remain = host->cur_sg->length;
remain = host->data_len - data->bytes_xfered;
if (remain > 0 && remain < host->data_remain)
host->data_remain = remain;
}
return host->num_sg;
}
static int moxart_wait_for_status(struct moxart_host *host, static int moxart_wait_for_status(struct moxart_host *host,
u32 mask, u32 *status) u32 mask, u32 *status)
{ {
@ -278,29 +309,14 @@ static void moxart_transfer_dma(struct mmc_data *data, struct moxart_host *host)
static void moxart_transfer_pio(struct moxart_host *host) static void moxart_transfer_pio(struct moxart_host *host)
{ {
struct sg_mapping_iter *sgm = &host->sg_miter;
struct mmc_data *data = host->mrq->cmd->data; struct mmc_data *data = host->mrq->cmd->data;
u32 *sgp, len = 0, remain, status; u32 *sgp, len = 0, remain, status;
if (host->data_len == data->bytes_xfered) if (host->data_len == data->bytes_xfered)
return; return;
/* sgp = sg_virt(host->cur_sg);
* By updating sgm->consumes this will get a proper pointer into the remain = host->data_remain;
* buffer at any time.
*/
if (!sg_miter_next(sgm)) {
/* This shold not happen */
dev_err(mmc_dev(host->mmc), "ran out of scatterlist prematurely\n");
data->error = -EINVAL;
complete(&host->pio_complete);
return;
}
sgp = sgm->addr;
remain = sgm->length;
if (remain > host->data_len)
remain = host->data_len;
sgm->consumed = 0;
if (data->flags & MMC_DATA_WRITE) { if (data->flags & MMC_DATA_WRITE) {
while (remain > 0) { while (remain > 0) {
@ -315,7 +331,6 @@ static void moxart_transfer_pio(struct moxart_host *host)
sgp++; sgp++;
len += 4; len += 4;
} }
sgm->consumed += len;
remain -= len; remain -= len;
} }
@ -332,22 +347,22 @@ static void moxart_transfer_pio(struct moxart_host *host)
sgp++; sgp++;
len += 4; len += 4;
} }
sgm->consumed += len;
remain -= len; remain -= len;
} }
} }
data->bytes_xfered += sgm->consumed; data->bytes_xfered += host->data_remain - remain;
if (host->data_len == data->bytes_xfered) { host->data_remain = remain;
if (host->data_len != data->bytes_xfered)
moxart_next_sg(host);
else
complete(&host->pio_complete); complete(&host->pio_complete);
return;
}
} }
static void moxart_prepare_data(struct moxart_host *host) static void moxart_prepare_data(struct moxart_host *host)
{ {
struct mmc_data *data = host->mrq->cmd->data; struct mmc_data *data = host->mrq->cmd->data;
unsigned int flags = SG_MITER_ATOMIC; /* Used from IRQ */
u32 datactrl; u32 datactrl;
int blksz_bits; int blksz_bits;
@ -358,19 +373,15 @@ static void moxart_prepare_data(struct moxart_host *host)
blksz_bits = ffs(data->blksz) - 1; blksz_bits = ffs(data->blksz) - 1;
BUG_ON(1 << blksz_bits != data->blksz); BUG_ON(1 << blksz_bits != data->blksz);
moxart_init_sg(host, data);
datactrl = DCR_DATA_EN | (blksz_bits & DCR_BLK_SIZE); datactrl = DCR_DATA_EN | (blksz_bits & DCR_BLK_SIZE);
if (data->flags & MMC_DATA_WRITE) { if (data->flags & MMC_DATA_WRITE)
flags |= SG_MITER_FROM_SG;
datactrl |= DCR_DATA_WRITE; datactrl |= DCR_DATA_WRITE;
} else {
flags |= SG_MITER_TO_SG;
}
if (moxart_use_dma(host)) if (moxart_use_dma(host))
datactrl |= DCR_DMA_EN; datactrl |= DCR_DMA_EN;
else
sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
writel(DCR_DATA_FIFO_RESET, host->base + REG_DATA_CONTROL); writel(DCR_DATA_FIFO_RESET, host->base + REG_DATA_CONTROL);
writel(MASK_DATA | FIFO_URUN | FIFO_ORUN, host->base + REG_CLEAR); writel(MASK_DATA | FIFO_URUN | FIFO_ORUN, host->base + REG_CLEAR);
@ -443,9 +454,6 @@ static void moxart_request(struct mmc_host *mmc, struct mmc_request *mrq)
} }
request_done: request_done:
if (!moxart_use_dma(host))
sg_miter_stop(&host->sg_miter);
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);
mmc_request_done(host->mmc, mrq); mmc_request_done(host->mmc, mrq);
} }

View File

@ -24,6 +24,7 @@
#define BRCMSTB_MATCH_FLAGS_NO_64BIT BIT(0) #define BRCMSTB_MATCH_FLAGS_NO_64BIT BIT(0)
#define BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT BIT(1) #define BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT BIT(1)
#define BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE BIT(2) #define BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE BIT(2)
#define BRCMSTB_MATCH_FLAGS_USE_CARD_BUSY BIT(4)
#define BRCMSTB_PRIV_FLAGS_HAS_CQE BIT(0) #define BRCMSTB_PRIV_FLAGS_HAS_CQE BIT(0)
#define BRCMSTB_PRIV_FLAGS_GATE_CLOCK BIT(1) #define BRCMSTB_PRIV_FLAGS_GATE_CLOCK BIT(1)
@ -444,6 +445,9 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT) if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT)
host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
if (!(match_priv->flags & BRCMSTB_MATCH_FLAGS_USE_CARD_BUSY))
host->mmc_host_ops.card_busy = NULL;
/* Change the base clock frequency if the DT property exists */ /* Change the base clock frequency if the DT property exists */
if (device_property_read_u32(&pdev->dev, "clock-frequency", if (device_property_read_u32(&pdev->dev, "clock-frequency",
&priv->base_freq_hz) != 0) &priv->base_freq_hz) != 0)

View File

@ -1326,7 +1326,7 @@ static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
if (ret) if (ret)
return ret; goto fail;
/* /*
* Turn PMOS on [bit 0], set over current detection to 2.4 V * Turn PMOS on [bit 0], set over current detection to 2.4 V
@ -1337,7 +1337,10 @@ static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
else else
scratch &= ~0x47; scratch &= ~0x47;
return pci_write_config_byte(chip->pdev, 0xAE, scratch); ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
fail:
return pcibios_err_to_errno(ret);
} }
static int jmicron_probe(struct sdhci_pci_chip *chip) static int jmicron_probe(struct sdhci_pci_chip *chip)
@ -2202,7 +2205,7 @@ static int sdhci_pci_probe(struct pci_dev *pdev,
ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
if (ret) if (ret)
return ret; return pcibios_err_to_errno(ret);
slots = PCI_SLOT_INFO_SLOTS(slots) + 1; slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
@ -2211,7 +2214,7 @@ static int sdhci_pci_probe(struct pci_dev *pdev,
ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
if (ret) if (ret)
return ret; return pcibios_err_to_errno(ret);
first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;

View File

@ -823,7 +823,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_LOCK_WP, &scratch); O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch &= 0x7f; scratch &= 0x7f;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
@ -834,7 +834,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_CLKREQ, &scratch); O2_SD_CLKREQ, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch |= 0x20; scratch |= 0x20;
pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch); pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
@ -843,7 +843,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
*/ */
ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch); ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch |= 0x01; scratch |= 0x01;
pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch); pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73); pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
@ -856,7 +856,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_INF_MOD, &scratch); O2_SD_INF_MOD, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch |= 0x08; scratch |= 0x08;
pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch); pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
@ -864,7 +864,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_LOCK_WP, &scratch); O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch |= 0x80; scratch |= 0x80;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
break; break;
@ -875,7 +875,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_LOCK_WP, &scratch); O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch &= 0x7f; scratch &= 0x7f;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
@ -886,7 +886,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
O2_SD_FUNC_REG0, O2_SD_FUNC_REG0,
&scratch_32); &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
scratch_32 = ((scratch_32 & 0xFF000000) >> 24); scratch_32 = ((scratch_32 & 0xFF000000) >> 24);
/* Check Whether subId is 0x11 or 0x12 */ /* Check Whether subId is 0x11 or 0x12 */
@ -898,7 +898,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
O2_SD_FUNC_REG4, O2_SD_FUNC_REG4,
&scratch_32); &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
/* Enable Base Clk setting change */ /* Enable Base Clk setting change */
scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET; scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;
@ -921,7 +921,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_dword(chip->pdev, ret = pci_read_config_dword(chip->pdev,
O2_SD_CLK_SETTING, &scratch_32); O2_SD_CLK_SETTING, &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
scratch_32 &= ~(0xFF00); scratch_32 &= ~(0xFF00);
scratch_32 |= 0x07E0C800; scratch_32 |= 0x07E0C800;
@ -931,14 +931,14 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_dword(chip->pdev, ret = pci_read_config_dword(chip->pdev,
O2_SD_CLKREQ, &scratch_32); O2_SD_CLKREQ, &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
scratch_32 |= 0x3; scratch_32 |= 0x3;
pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32); pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32);
ret = pci_read_config_dword(chip->pdev, ret = pci_read_config_dword(chip->pdev,
O2_SD_PLL_SETTING, &scratch_32); O2_SD_PLL_SETTING, &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
scratch_32 &= ~(0x1F3F070E); scratch_32 &= ~(0x1F3F070E);
scratch_32 |= 0x18270106; scratch_32 |= 0x18270106;
@ -949,7 +949,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_dword(chip->pdev, ret = pci_read_config_dword(chip->pdev,
O2_SD_CAP_REG2, &scratch_32); O2_SD_CAP_REG2, &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
scratch_32 &= ~(0xE0); scratch_32 &= ~(0xE0);
pci_write_config_dword(chip->pdev, pci_write_config_dword(chip->pdev,
O2_SD_CAP_REG2, scratch_32); O2_SD_CAP_REG2, scratch_32);
@ -961,7 +961,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_LOCK_WP, &scratch); O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch |= 0x80; scratch |= 0x80;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
break; break;
@ -971,7 +971,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_LOCK_WP, &scratch); O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch &= 0x7f; scratch &= 0x7f;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
@ -979,7 +979,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_dword(chip->pdev, ret = pci_read_config_dword(chip->pdev,
O2_SD_PLL_SETTING, &scratch_32); O2_SD_PLL_SETTING, &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
if ((scratch_32 & 0xff000000) == 0x01000000) { if ((scratch_32 & 0xff000000) == 0x01000000) {
scratch_32 &= 0x0000FFFF; scratch_32 &= 0x0000FFFF;
@ -998,7 +998,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
O2_SD_FUNC_REG4, O2_SD_FUNC_REG4,
&scratch_32); &scratch_32);
if (ret) if (ret)
return ret; goto read_fail;
scratch_32 |= (1 << 22); scratch_32 |= (1 << 22);
pci_write_config_dword(chip->pdev, pci_write_config_dword(chip->pdev,
O2_SD_FUNC_REG4, scratch_32); O2_SD_FUNC_REG4, scratch_32);
@ -1017,7 +1017,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
ret = pci_read_config_byte(chip->pdev, ret = pci_read_config_byte(chip->pdev,
O2_SD_LOCK_WP, &scratch); O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch |= 0x80; scratch |= 0x80;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
break; break;
@ -1028,7 +1028,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
/* UnLock WP */ /* UnLock WP */
ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch); ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch &= 0x7f; scratch &= 0x7f;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
@ -1057,13 +1057,16 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
/* Lock WP */ /* Lock WP */
ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch); ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
if (ret) if (ret)
return ret; goto read_fail;
scratch |= 0x80; scratch |= 0x80;
pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
break; break;
} }
return 0; return 0;
read_fail:
return pcibios_err_to_errno(ret);
} }
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP