drm/xe: Drop xe_gt_tlb_invalidation_wait
Having two methods to wait on GT TLB invalidations is not ideal. Remove
xe_gt_tlb_invalidation_wait and only use GT TLB invalidation fences.
In addition to two methods being less than ideal, once GT TLB
invalidations are coalesced the seqno cannot be assigned during
xe_gt_tlb_invalidation_ggtt/range. Thus xe_gt_tlb_invalidation_wait
would not have a seqno to wait one. A fence however can be armed and
later signaled.
v3:
- Add explaination about coalescing to commit message
v4:
- Don't put dma fence if defined on stack (CI)
v5:
- Initialize ret to zero (CI)
v6:
- Use invalidation_fence_signal helper in tlb timeout (Matthew Auld)
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240719172905.1527927-3-matthew.brost@intel.com
(cherry picked from commit 61ac035361)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Matthew Brost
Rodrigo Vivi
parent
90be4cc6f7
commit
58bfe66744
@ -17,6 +17,8 @@
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#include "xe_trace.h"
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#include "regs/xe_guc_regs.h"
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#define FENCE_STACK_BIT DMA_FENCE_FLAG_USER_BITS
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/*
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* TLB inval depends on pending commands in the CT queue and then the real
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* invalidation time. Double up the time to process full CT queue
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@ -33,6 +35,23 @@ static long tlb_timeout_jiffies(struct xe_gt *gt)
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return hw_tlb_timeout + 2 * delay;
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}
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static void
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__invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
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{
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bool stack = test_bit(FENCE_STACK_BIT, &fence->base.flags);
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trace_xe_gt_tlb_invalidation_fence_signal(xe, fence);
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dma_fence_signal(&fence->base);
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if (!stack)
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dma_fence_put(&fence->base);
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}
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static void
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invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
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{
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list_del(&fence->link);
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__invalidation_fence_signal(xe, fence);
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}
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static void xe_gt_tlb_fence_timeout(struct work_struct *work)
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{
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@ -54,10 +73,8 @@ static void xe_gt_tlb_fence_timeout(struct work_struct *work)
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xe_gt_err(gt, "TLB invalidation fence timeout, seqno=%d recv=%d",
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fence->seqno, gt->tlb_invalidation.seqno_recv);
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list_del(&fence->link);
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fence->base.error = -ETIME;
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dma_fence_signal(&fence->base);
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dma_fence_put(&fence->base);
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invalidation_fence_signal(xe, fence);
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}
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if (!list_empty(>->tlb_invalidation.pending_fences))
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queue_delayed_work(system_wq,
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@ -87,21 +104,6 @@ int xe_gt_tlb_invalidation_init(struct xe_gt *gt)
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return 0;
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}
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static void
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__invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
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{
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trace_xe_gt_tlb_invalidation_fence_signal(xe, fence);
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dma_fence_signal(&fence->base);
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dma_fence_put(&fence->base);
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}
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static void
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invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
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{
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list_del(&fence->link);
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__invalidation_fence_signal(xe, fence);
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}
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/**
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* xe_gt_tlb_invalidation_reset - Initialize GT TLB invalidation reset
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* @gt: graphics tile
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@ -111,7 +113,6 @@ invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fe
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void xe_gt_tlb_invalidation_reset(struct xe_gt *gt)
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{
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struct xe_gt_tlb_invalidation_fence *fence, *next;
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struct xe_guc *guc = >->uc.guc;
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int pending_seqno;
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/*
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@ -134,7 +135,6 @@ void xe_gt_tlb_invalidation_reset(struct xe_gt *gt)
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else
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pending_seqno = gt->tlb_invalidation.seqno - 1;
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WRITE_ONCE(gt->tlb_invalidation.seqno_recv, pending_seqno);
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wake_up_all(&guc->ct.wq);
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list_for_each_entry_safe(fence, next,
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>->tlb_invalidation.pending_fences, link)
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@ -165,6 +165,8 @@ static int send_tlb_invalidation(struct xe_guc *guc,
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int seqno;
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int ret;
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xe_gt_assert(gt, fence);
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/*
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* XXX: The seqno algorithm relies on TLB invalidation being processed
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* in order which they currently are, if that changes the algorithm will
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@ -173,10 +175,8 @@ static int send_tlb_invalidation(struct xe_guc *guc,
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mutex_lock(&guc->ct.lock);
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seqno = gt->tlb_invalidation.seqno;
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if (fence) {
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fence->seqno = seqno;
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trace_xe_gt_tlb_invalidation_fence_send(xe, fence);
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}
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fence->seqno = seqno;
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trace_xe_gt_tlb_invalidation_fence_send(xe, fence);
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action[1] = seqno;
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ret = xe_guc_ct_send_locked(&guc->ct, action, len,
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G2H_LEN_DW_TLB_INVALIDATE, 1);
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@ -209,7 +209,6 @@ static int send_tlb_invalidation(struct xe_guc *guc,
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TLB_INVALIDATION_SEQNO_MAX;
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if (!gt->tlb_invalidation.seqno)
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gt->tlb_invalidation.seqno = 1;
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ret = seqno;
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}
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mutex_unlock(&guc->ct.lock);
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@ -223,14 +222,16 @@ static int send_tlb_invalidation(struct xe_guc *guc,
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/**
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* xe_gt_tlb_invalidation_guc - Issue a TLB invalidation on this GT for the GuC
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* @gt: graphics tile
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* @fence: invalidation fence which will be signal on TLB invalidation
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* completion
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*
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* Issue a TLB invalidation for the GuC. Completion of TLB is asynchronous and
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* caller can use seqno + xe_gt_tlb_invalidation_wait to wait for completion.
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* caller can use the invalidation fence to wait for completion.
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*
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* Return: Seqno which can be passed to xe_gt_tlb_invalidation_wait on success,
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* negative error code on error.
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* Return: 0 on success, negative error code on error
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*/
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static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt)
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static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt,
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struct xe_gt_tlb_invalidation_fence *fence)
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{
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u32 action[] = {
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XE_GUC_ACTION_TLB_INVALIDATION,
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@ -238,7 +239,7 @@ static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt)
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MAKE_INVAL_OP(XE_GUC_TLB_INVAL_GUC),
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};
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return send_tlb_invalidation(>->uc.guc, NULL, action,
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return send_tlb_invalidation(>->uc.guc, fence, action,
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ARRAY_SIZE(action));
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}
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@ -257,13 +258,15 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
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if (xe_guc_ct_enabled(>->uc.guc.ct) &&
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gt->uc.guc.submission_state.enabled) {
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int seqno;
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struct xe_gt_tlb_invalidation_fence fence;
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int ret;
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seqno = xe_gt_tlb_invalidation_guc(gt);
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if (seqno <= 0)
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return seqno;
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xe_gt_tlb_invalidation_fence_init(gt, &fence, true);
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ret = xe_gt_tlb_invalidation_guc(gt, &fence);
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if (ret < 0)
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return ret;
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xe_gt_tlb_invalidation_wait(gt, seqno);
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xe_gt_tlb_invalidation_fence_wait(&fence);
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} else if (xe_device_uc_enabled(xe) && !xe_device_wedged(xe)) {
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if (IS_SRIOV_VF(xe))
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return 0;
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@ -290,18 +293,16 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
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*
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* @gt: graphics tile
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* @fence: invalidation fence which will be signal on TLB invalidation
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* completion, can be NULL
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* completion
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* @start: start address
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* @end: end address
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* @asid: address space id
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*
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* Issue a range based TLB invalidation if supported, if not fallback to a full
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* TLB invalidation. Completion of TLB is asynchronous and caller can either use
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* the invalidation fence or seqno + xe_gt_tlb_invalidation_wait to wait for
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* completion.
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* TLB invalidation. Completion of TLB is asynchronous and caller can use
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* the invalidation fence to wait for completion.
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*
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* Return: Seqno which can be passed to xe_gt_tlb_invalidation_wait on success,
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* negative error code on error.
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* Return: Negative error code on error, 0 on success
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*/
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int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
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struct xe_gt_tlb_invalidation_fence *fence,
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@ -312,11 +313,11 @@ int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
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u32 action[MAX_TLB_INVALIDATION_LEN];
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int len = 0;
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xe_gt_assert(gt, fence);
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/* Execlists not supported */
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if (gt_to_xe(gt)->info.force_execlist) {
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if (fence)
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__invalidation_fence_signal(xe, fence);
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__invalidation_fence_signal(xe, fence);
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return 0;
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}
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@ -382,12 +383,10 @@ int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
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* @vma: VMA to invalidate
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*
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* Issue a range based TLB invalidation if supported, if not fallback to a full
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* TLB invalidation. Completion of TLB is asynchronous and caller can either use
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* the invalidation fence or seqno + xe_gt_tlb_invalidation_wait to wait for
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* completion.
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* TLB invalidation. Completion of TLB is asynchronous and caller can use
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* the invalidation fence to wait for completion.
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*
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* Return: Seqno which can be passed to xe_gt_tlb_invalidation_wait on success,
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* negative error code on error.
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* Return: Negative error code on error, 0 on success
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*/
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int xe_gt_tlb_invalidation_vma(struct xe_gt *gt,
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struct xe_gt_tlb_invalidation_fence *fence,
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@ -400,43 +399,6 @@ int xe_gt_tlb_invalidation_vma(struct xe_gt *gt,
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xe_vma_vm(vma)->usm.asid);
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}
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/**
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* xe_gt_tlb_invalidation_wait - Wait for TLB to complete
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* @gt: graphics tile
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* @seqno: seqno to wait which was returned from xe_gt_tlb_invalidation
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*
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* Wait for tlb_timeout_jiffies() for a TLB invalidation to complete.
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*
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* Return: 0 on success, -ETIME on TLB invalidation timeout
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*/
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int xe_gt_tlb_invalidation_wait(struct xe_gt *gt, int seqno)
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{
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struct xe_guc *guc = >->uc.guc;
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int ret;
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/* Execlists not supported */
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if (gt_to_xe(gt)->info.force_execlist)
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return 0;
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/*
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* XXX: See above, this algorithm only works if seqno are always in
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* order
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*/
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ret = wait_event_timeout(guc->ct.wq,
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tlb_invalidation_seqno_past(gt, seqno),
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tlb_timeout_jiffies(gt));
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if (!ret) {
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struct drm_printer p = xe_gt_err_printer(gt);
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xe_gt_err(gt, "TLB invalidation time'd out, seqno=%d, recv=%d\n",
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seqno, gt->tlb_invalidation.seqno_recv);
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xe_guc_ct_print(&guc->ct, &p, true);
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return -ETIME;
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}
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return 0;
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}
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/**
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* xe_guc_tlb_invalidation_done_handler - TLB invalidation done handler
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* @guc: guc
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@ -480,12 +442,7 @@ int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
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return 0;
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}
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/*
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* wake_up_all() and wait_event_timeout() already have the correct
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* barriers.
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*/
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WRITE_ONCE(gt->tlb_invalidation.seqno_recv, msg[0]);
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wake_up_all(&guc->ct.wq);
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list_for_each_entry_safe(fence, next,
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>->tlb_invalidation.pending_fences, link) {
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@ -530,11 +487,13 @@ static const struct dma_fence_ops invalidation_fence_ops = {
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* xe_gt_tlb_invalidation_fence_init - Initialize TLB invalidation fence
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* @gt: GT
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* @fence: TLB invalidation fence to initialize
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* @stack: fence is stack variable
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*
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* Initialize TLB invalidation fence for use
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*/
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void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
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struct xe_gt_tlb_invalidation_fence *fence)
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struct xe_gt_tlb_invalidation_fence *fence,
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bool stack)
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{
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spin_lock_irq(>->tlb_invalidation.lock);
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dma_fence_init(&fence->base, &invalidation_fence_ops,
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@ -542,5 +501,8 @@ void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
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dma_fence_context_alloc(1), 1);
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spin_unlock_irq(>->tlb_invalidation.lock);
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INIT_LIST_HEAD(&fence->link);
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dma_fence_get(&fence->base);
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if (stack)
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set_bit(FENCE_STACK_BIT, &fence->base.flags);
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else
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dma_fence_get(&fence->base);
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}
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@ -23,10 +23,16 @@ int xe_gt_tlb_invalidation_vma(struct xe_gt *gt,
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int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
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struct xe_gt_tlb_invalidation_fence *fence,
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u64 start, u64 end, u32 asid);
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int xe_gt_tlb_invalidation_wait(struct xe_gt *gt, int seqno);
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int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
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void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
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struct xe_gt_tlb_invalidation_fence *fence);
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struct xe_gt_tlb_invalidation_fence *fence,
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bool stack);
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static inline void
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xe_gt_tlb_invalidation_fence_wait(struct xe_gt_tlb_invalidation_fence *fence)
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{
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dma_fence_wait(&fence->base, false);
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}
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#endif /* _XE_GT_TLB_INVALIDATION_ */
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@ -1153,7 +1153,7 @@ static int invalidation_fence_init(struct xe_gt *gt,
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trace_xe_gt_tlb_invalidation_fence_create(gt_to_xe(gt), &ifence->base);
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xe_gt_tlb_invalidation_fence_init(gt, &ifence->base);
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xe_gt_tlb_invalidation_fence_init(gt, &ifence->base, false);
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ifence->fence = fence;
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ifence->gt = gt;
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@ -3341,10 +3341,10 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
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{
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struct xe_device *xe = xe_vma_vm(vma)->xe;
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struct xe_tile *tile;
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struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE];
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u32 tile_needs_invalidate = 0;
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int seqno[XE_MAX_TILES_PER_DEVICE];
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u8 id;
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int ret;
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int ret = 0;
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xe_assert(xe, !xe_vma_is_null(vma));
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trace_xe_vma_invalidate(vma);
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@ -3369,29 +3369,31 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
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for_each_tile(tile, xe, id) {
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if (xe_pt_zap_ptes(tile, vma)) {
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tile_needs_invalidate |= BIT(id);
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xe_device_wmb(xe);
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xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
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&fence[id], true);
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/*
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* FIXME: We potentially need to invalidate multiple
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* GTs within the tile
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*/
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seqno[id] = xe_gt_tlb_invalidation_vma(tile->primary_gt, NULL, vma);
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if (seqno[id] < 0)
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return seqno[id];
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ret = xe_gt_tlb_invalidation_vma(tile->primary_gt,
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&fence[id], vma);
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if (ret < 0)
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goto wait;
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tile_needs_invalidate |= BIT(id);
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}
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}
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for_each_tile(tile, xe, id) {
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if (tile_needs_invalidate & BIT(id)) {
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ret = xe_gt_tlb_invalidation_wait(tile->primary_gt, seqno[id]);
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if (ret < 0)
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return ret;
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}
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}
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wait:
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for_each_tile(tile, xe, id)
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if (tile_needs_invalidate & BIT(id))
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xe_gt_tlb_invalidation_fence_wait(&fence[id]);
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vma->tile_invalidated = vma->tile_mask;
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return 0;
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return ret;
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}
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struct xe_vm_snapshot {
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