Merge branch 'iommu/pci/ats' into iommu/next
* iommu/pci/ats: arm64: dts: fvp: Enable PCIe ATS for Base RevC FVP iommu/of: Support ats-supported device-tree property dt-bindings: PCI: generic: Add ats-supported property
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commit
578cc98b66
@ -110,6 +110,12 @@ properties:
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iommu-map-mask: true
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msi-parent: true
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ats-supported:
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description:
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Indicates that a PCIe host controller supports ATS, and can handle Memory
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Requests with Address Type (AT).
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type: boolean
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required:
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- compatible
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- reg
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@ -243,6 +243,7 @@
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iommu-map = <0x0 &smmu 0x0 0x10000>;
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dma-coherent;
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ats-supported;
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};
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smmu: iommu@2b400000 {
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@ -100,6 +100,14 @@ static int of_iommu_configure_device(struct device_node *master_np,
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of_iommu_configure_dev(master_np, dev);
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}
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static void of_pci_check_device_ats(struct device *dev, struct device_node *np)
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{
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
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if (fwspec && of_property_read_bool(np, "ats-supported"))
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fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
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}
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/*
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* Returns:
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* 0 on success, an iommu was configured
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@ -136,6 +144,7 @@ int of_iommu_configure(struct device *dev, struct device_node *master_np,
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pci_request_acs();
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err = pci_for_each_dma_alias(to_pci_dev(dev),
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of_pci_iommu_init, &info);
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of_pci_check_device_ats(dev, master_np);
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} else {
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err = of_iommu_configure_device(master_np, dev, id);
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}
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