Merge branch 'for-linus' into for-next
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
commit
5516e3f476
@ -54,7 +54,7 @@ enum sof_comp_type {
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struct sof_ipc_comp {
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struct sof_ipc_cmd_hdr hdr;
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uint32_t id;
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enum sof_comp_type type;
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uint32_t type;
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uint32_t pipeline_id;
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uint32_t core;
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@ -29,7 +29,7 @@
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/* SOF ABI version major, minor and patch numbers */
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#define SOF_ABI_MAJOR 3
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#define SOF_ABI_MINOR 23
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#define SOF_ABI_PATCH 0
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#define SOF_ABI_PATCH 1
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/* SOF ABI version number. Format within 32bit word is MMmmmppp */
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#define SOF_ABI_MAJOR_SHIFT 24
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@ -10183,6 +10183,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
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SND_PCI_QUIRK(0x103c, 0x87f5, "HP", ALC287_FIXUP_HP_GPIO_LED),
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SND_PCI_QUIRK(0x103c, 0x87f6, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP),
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SND_PCI_QUIRK(0x103c, 0x87f7, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP),
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SND_PCI_QUIRK(0x103c, 0x87fd, "HP Laptop 14-dq2xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2),
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SND_PCI_QUIRK(0x103c, 0x87fe, "HP Laptop 15s-fq2xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2),
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SND_PCI_QUIRK(0x103c, 0x8805, "HP ProBook 650 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
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SND_PCI_QUIRK(0x103c, 0x880d, "HP EliteBook 830 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED),
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@ -10307,6 +10308,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
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SND_PCI_QUIRK(0x103c, 0x8c16, "HP Spectre 16", ALC287_FIXUP_CS35L41_I2C_2),
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SND_PCI_QUIRK(0x103c, 0x8c17, "HP Spectre 16", ALC287_FIXUP_CS35L41_I2C_2),
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SND_PCI_QUIRK(0x103c, 0x8c21, "HP Pavilion Plus Laptop 14-ey0XXX", ALC245_FIXUP_HP_X360_MUTE_LEDS),
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SND_PCI_QUIRK(0x103c, 0x8c30, "HP Victus 15-fb1xxx", ALC245_FIXUP_HP_MUTE_LED_COEFBIT),
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SND_PCI_QUIRK(0x103c, 0x8c46, "HP EliteBook 830 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
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SND_PCI_QUIRK(0x103c, 0x8c47, "HP EliteBook 840 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
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SND_PCI_QUIRK(0x103c, 0x8c48, "HP EliteBook 860 G11", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
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@ -10433,6 +10435,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
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SND_PCI_QUIRK(0x1043, 0x1e02, "ASUS UX3402ZA", ALC245_FIXUP_CS35L41_SPI_2),
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SND_PCI_QUIRK(0x1043, 0x1e11, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA502),
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SND_PCI_QUIRK(0x1043, 0x1e12, "ASUS UM3402", ALC287_FIXUP_CS35L41_I2C_2),
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SND_PCI_QUIRK(0x1043, 0x1e1f, "ASUS Vivobook 15 X1504VAP", ALC2XX_FIXUP_HEADSET_MIC),
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SND_PCI_QUIRK(0x1043, 0x1e51, "ASUS Zephyrus M15", ALC294_FIXUP_ASUS_GU502_PINS),
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SND_PCI_QUIRK(0x1043, 0x1e5e, "ASUS ROG Strix G513", ALC294_FIXUP_ASUS_G513_PINS),
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SND_PCI_QUIRK(0x1043, 0x1e8e, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA401),
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@ -353,6 +353,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = {
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DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 C7VF"),
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}
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},
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{
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.driver_data = &acp6x_card,
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "Micro-Star International Co., Ltd."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 17 D7VEK"),
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}
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},
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{
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.driver_data = &acp6x_card,
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.matches = {
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@ -26,6 +26,7 @@ static const struct of_device_id chv3_codec_of_match[] = {
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{ .compatible = "google,chv3-codec", },
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{ }
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};
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MODULE_DEVICE_TABLE(of, chv3_codec_of_match);
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static struct platform_driver chv3_codec_platform_driver = {
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.driver = {
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@ -228,11 +228,13 @@ struct va_macro {
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struct va_macro_data {
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bool has_swr_master;
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bool has_npl_clk;
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int version;
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};
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static const struct va_macro_data sm8250_va_data = {
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.has_swr_master = false,
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.has_npl_clk = false,
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.version = LPASS_CODEC_VERSION_1_0,
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};
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static const struct va_macro_data sm8450_va_data = {
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@ -1587,6 +1589,13 @@ static int va_macro_probe(struct platform_device *pdev)
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goto err_npl;
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}
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/**
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* old version of codecs do not have a reliable way to determine the
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* version from registers, get them from soc specific data
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*/
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if (data->version)
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lpass_macro_set_codec_version(data->version);
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else /* read version from register */
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va_macro_set_lpass_codec_version(va);
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if (va->has_swr_master) {
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@ -623,6 +623,7 @@ static const struct of_device_id tda7419_of_match[] = {
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{ .compatible = "st,tda7419" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, tda7419_of_match);
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static struct i2c_driver tda7419_driver = {
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.driver = {
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@ -322,6 +322,7 @@ static const struct of_device_id chv3_i2s_of_match[] = {
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{ .compatible = "google,chv3-i2s" },
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{},
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};
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MODULE_DEVICE_TABLE(of, chv3_i2s_of_match);
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static struct platform_driver chv3_i2s_driver = {
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.probe = chv3_i2s_probe,
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@ -605,7 +605,7 @@ static int broxton_audio_probe(struct platform_device *pdev)
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int i;
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for (i = 0; i < ARRAY_SIZE(broxton_rt298_dais); i++) {
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if (card->dai_link[i].codecs->name &&
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if (card->dai_link[i].num_codecs &&
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!strncmp(card->dai_link[i].codecs->name, "i2c-INT343A:00",
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I2C_NAME_SIZE)) {
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if (!strncmp(card->name, "broxton-rt298",
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@ -241,7 +241,7 @@ static int snd_byt_cht_cx2072x_probe(struct platform_device *pdev)
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/* fix index of codec dai */
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for (i = 0; i < ARRAY_SIZE(byt_cht_cx2072x_dais); i++) {
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if (byt_cht_cx2072x_dais[i].codecs->name &&
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if (byt_cht_cx2072x_dais[i].num_codecs &&
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!strcmp(byt_cht_cx2072x_dais[i].codecs->name,
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"i2c-14F10720:00")) {
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dai_index = i;
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@ -245,7 +245,7 @@ static int bytcht_da7213_probe(struct platform_device *pdev)
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/* fix index of codec dai */
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for (i = 0; i < ARRAY_SIZE(dailink); i++) {
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if (dailink[i].codecs->name &&
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if (dailink[i].num_codecs &&
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!strcmp(dailink[i].codecs->name, "i2c-DLGS7213:00")) {
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dai_index = i;
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break;
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@ -546,7 +546,7 @@ static int snd_byt_cht_es8316_mc_probe(struct platform_device *pdev)
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/* fix index of codec dai */
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for (i = 0; i < ARRAY_SIZE(byt_cht_es8316_dais); i++) {
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if (byt_cht_es8316_dais[i].codecs->name &&
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if (byt_cht_es8316_dais[i].num_codecs &&
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!strcmp(byt_cht_es8316_dais[i].codecs->name,
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"i2c-ESSX8316:00")) {
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dai_index = i;
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@ -1677,7 +1677,7 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
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/* fix index of codec dai */
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for (i = 0; i < ARRAY_SIZE(byt_rt5640_dais); i++) {
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if (byt_rt5640_dais[i].codecs->name &&
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if (byt_rt5640_dais[i].num_codecs &&
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!strcmp(byt_rt5640_dais[i].codecs->name,
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"i2c-10EC5640:00")) {
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dai_index = i;
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@ -910,7 +910,7 @@ static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
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/* fix index of codec dai */
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for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
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if (byt_rt5651_dais[i].codecs->name &&
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if (byt_rt5651_dais[i].num_codecs &&
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!strcmp(byt_rt5651_dais[i].codecs->name,
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"i2c-10EC5651:00")) {
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dai_index = i;
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@ -605,7 +605,7 @@ static int snd_byt_wm5102_mc_probe(struct platform_device *pdev)
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/* find index of codec dai */
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for (i = 0; i < ARRAY_SIZE(byt_wm5102_dais); i++) {
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if (byt_wm5102_dais[i].codecs->name &&
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if (byt_wm5102_dais[i].num_codecs &&
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!strcmp(byt_wm5102_dais[i].codecs->name,
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"wm5102-codec")) {
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dai_index = i;
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@ -569,7 +569,7 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
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/* set correct codec name */
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for (i = 0; i < ARRAY_SIZE(cht_dailink); i++)
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if (cht_dailink[i].codecs->name &&
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if (cht_dailink[i].num_codecs &&
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!strcmp(cht_dailink[i].codecs->name,
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"i2c-10EC5645:00")) {
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dai_index = i;
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@ -466,7 +466,7 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
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/* find index of codec dai */
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for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
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if (cht_dailink[i].codecs->name &&
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if (cht_dailink[i].num_codecs &&
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!strcmp(cht_dailink[i].codecs->name, RT5672_I2C_DEFAULT)) {
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dai_index = i;
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break;
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@ -84,7 +84,6 @@ static const struct dmi_system_id lenovo_yoga_tab3_x90[] = {
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/* Lenovo Yoga Tab 3 Pro YT3-X90, codec missing from DSDT */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),
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DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"),
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},
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},
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@ -814,6 +814,7 @@ static const struct of_device_id kmb_plat_of_match[] = {
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{ .compatible = "intel,keembay-tdm", .data = &intel_kmb_tdm_dai},
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{}
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};
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MODULE_DEVICE_TABLE(of, kmb_plat_of_match);
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static int kmb_plat_dai_probe(struct platform_device *pdev)
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{
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@ -734,6 +734,7 @@ static int mt8188_headset_codec_init(struct snd_soc_pcm_runtime *rtd)
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struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card);
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struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8188_JACK_HEADSET];
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struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component;
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struct mtk_platform_card_data *card_data = soc_card_data->card_data;
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int ret;
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ret = snd_soc_dapm_new_controls(&card->dapm, mt8188_nau8825_widgets,
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@ -762,10 +763,18 @@ static int mt8188_headset_codec_init(struct snd_soc_pcm_runtime *rtd)
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return ret;
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}
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if (card_data->flags & ES8326_HS_PRESENT) {
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snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
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snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
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snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
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snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOICECOMMAND);
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} else {
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snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
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snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
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snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
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snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
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}
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ret = snd_soc_component_set_jack(component, jack, NULL);
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if (ret) {
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|
@ -4057,6 +4057,7 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w,
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case SND_SOC_DAPM_POST_PMD:
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kfree(substream->runtime);
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substream->runtime = NULL;
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break;
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default:
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|
@ -2050,6 +2050,8 @@ static int sof_link_unload(struct snd_soc_component *scomp, struct snd_soc_dobj
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if (!slink)
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return 0;
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slink->link->platforms->name = NULL;
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kfree(slink->tuples);
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list_del(&slink->list);
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kfree(slink->hw_configs);
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|
@ -100,8 +100,8 @@
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#define SUN8I_I2S_CTRL_MODE_PCM (0 << 4)
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#define SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK BIT(19)
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#define SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED (1 << 19)
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#define SUN8I_I2S_FMT0_LRCLK_POLARITY_NORMAL (0 << 19)
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#define SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH (1 << 19)
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#define SUN8I_I2S_FMT0_LRCLK_POLARITY_START_LOW (0 << 19)
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#define SUN8I_I2S_FMT0_LRCK_PERIOD_MASK GENMASK(17, 8)
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#define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period - 1) << 8)
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#define SUN8I_I2S_FMT0_BCLK_POLARITY_MASK BIT(7)
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@ -729,65 +729,37 @@ static int sun4i_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
|
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static int sun8i_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
|
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unsigned int fmt)
|
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{
|
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u32 mode, val;
|
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u32 mode, lrclk_pol, bclk_pol, val;
|
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u8 offset;
|
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|
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/*
|
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* DAI clock polarity
|
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*
|
||||
* The setup for LRCK contradicts the datasheet, but under a
|
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* scope it's clear that the LRCK polarity is reversed
|
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* compared to the expected polarity on the bus.
|
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*/
|
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
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case SND_SOC_DAIFMT_IB_IF:
|
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/* Invert both clocks */
|
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val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED;
|
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break;
|
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case SND_SOC_DAIFMT_IB_NF:
|
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/* Invert bit clock */
|
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val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED |
|
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SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_IF:
|
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/* Invert frame clock */
|
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val = 0;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_NF:
|
||||
val = SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
|
||||
break;
|
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default:
|
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return -EINVAL;
|
||||
}
|
||||
|
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regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
|
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SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK |
|
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SUN8I_I2S_FMT0_BCLK_POLARITY_MASK,
|
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val);
|
||||
|
||||
/* DAI Mode */
|
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
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case SND_SOC_DAIFMT_DSP_A:
|
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lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_PCM;
|
||||
offset = 1;
|
||||
break;
|
||||
|
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case SND_SOC_DAIFMT_DSP_B:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_PCM;
|
||||
offset = 0;
|
||||
break;
|
||||
|
||||
case SND_SOC_DAIFMT_I2S:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_LOW;
|
||||
mode = SUN8I_I2S_CTRL_MODE_LEFT;
|
||||
offset = 1;
|
||||
break;
|
||||
|
||||
case SND_SOC_DAIFMT_LEFT_J:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_LEFT;
|
||||
offset = 0;
|
||||
break;
|
||||
|
||||
case SND_SOC_DAIFMT_RIGHT_J:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_RIGHT;
|
||||
offset = 0;
|
||||
break;
|
||||
@ -805,6 +777,35 @@ static int sun8i_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
|
||||
SUN8I_I2S_TX_CHAN_OFFSET_MASK,
|
||||
SUN8I_I2S_TX_CHAN_OFFSET(offset));
|
||||
|
||||
/* DAI clock polarity */
|
||||
bclk_pol = SUN8I_I2S_FMT0_BCLK_POLARITY_NORMAL;
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
||||
case SND_SOC_DAIFMT_IB_IF:
|
||||
/* Invert both clocks */
|
||||
lrclk_pol ^= SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK;
|
||||
bclk_pol = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_IB_NF:
|
||||
/* Invert bit clock */
|
||||
bclk_pol = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_IF:
|
||||
/* Invert frame clock */
|
||||
lrclk_pol ^= SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_NF:
|
||||
/* No inversion */
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
|
||||
SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK |
|
||||
SUN8I_I2S_FMT0_BCLK_POLARITY_MASK,
|
||||
lrclk_pol | bclk_pol);
|
||||
|
||||
/* DAI clock master masks */
|
||||
switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
|
||||
case SND_SOC_DAIFMT_BP_FP:
|
||||
@ -836,65 +837,37 @@ static int sun8i_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
|
||||
static int sun50i_h6_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
|
||||
unsigned int fmt)
|
||||
{
|
||||
u32 mode, val;
|
||||
u32 mode, lrclk_pol, bclk_pol, val;
|
||||
u8 offset;
|
||||
|
||||
/*
|
||||
* DAI clock polarity
|
||||
*
|
||||
* The setup for LRCK contradicts the datasheet, but under a
|
||||
* scope it's clear that the LRCK polarity is reversed
|
||||
* compared to the expected polarity on the bus.
|
||||
*/
|
||||
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
||||
case SND_SOC_DAIFMT_IB_IF:
|
||||
/* Invert both clocks */
|
||||
val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_IB_NF:
|
||||
/* Invert bit clock */
|
||||
val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED |
|
||||
SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_IF:
|
||||
/* Invert frame clock */
|
||||
val = 0;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_NF:
|
||||
val = SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
|
||||
SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK |
|
||||
SUN8I_I2S_FMT0_BCLK_POLARITY_MASK,
|
||||
val);
|
||||
|
||||
/* DAI Mode */
|
||||
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
||||
case SND_SOC_DAIFMT_DSP_A:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_PCM;
|
||||
offset = 1;
|
||||
break;
|
||||
|
||||
case SND_SOC_DAIFMT_DSP_B:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_PCM;
|
||||
offset = 0;
|
||||
break;
|
||||
|
||||
case SND_SOC_DAIFMT_I2S:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_LOW;
|
||||
mode = SUN8I_I2S_CTRL_MODE_LEFT;
|
||||
offset = 1;
|
||||
break;
|
||||
|
||||
case SND_SOC_DAIFMT_LEFT_J:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_LEFT;
|
||||
offset = 0;
|
||||
break;
|
||||
|
||||
case SND_SOC_DAIFMT_RIGHT_J:
|
||||
lrclk_pol = SUN8I_I2S_FMT0_LRCLK_POLARITY_START_HIGH;
|
||||
mode = SUN8I_I2S_CTRL_MODE_RIGHT;
|
||||
offset = 0;
|
||||
break;
|
||||
@ -912,6 +885,36 @@ static int sun50i_h6_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
|
||||
SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET_MASK,
|
||||
SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET(offset));
|
||||
|
||||
/* DAI clock polarity */
|
||||
bclk_pol = SUN8I_I2S_FMT0_BCLK_POLARITY_NORMAL;
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
||||
case SND_SOC_DAIFMT_IB_IF:
|
||||
/* Invert both clocks */
|
||||
lrclk_pol ^= SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK;
|
||||
bclk_pol = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_IB_NF:
|
||||
/* Invert bit clock */
|
||||
bclk_pol = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_IF:
|
||||
/* Invert frame clock */
|
||||
lrclk_pol ^= SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_NB_NF:
|
||||
/* No inversion */
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
|
||||
SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK |
|
||||
SUN8I_I2S_FMT0_BCLK_POLARITY_MASK,
|
||||
lrclk_pol | bclk_pol);
|
||||
|
||||
|
||||
/* DAI clock master masks */
|
||||
switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
|
||||
case SND_SOC_DAIFMT_BP_FP:
|
||||
|
@ -2,7 +2,7 @@
|
||||
//
|
||||
// tegra210_ahub.c - Tegra210 AHUB driver
|
||||
//
|
||||
// Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
|
||||
// Copyright (c) 2020-2024, NVIDIA CORPORATION. All rights reserved.
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/device.h>
|
||||
@ -1391,12 +1391,14 @@ static int tegra_ahub_probe(struct platform_device *pdev)
|
||||
return err;
|
||||
}
|
||||
|
||||
err = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
err = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
|
||||
if (err) {
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user