powerpc fixes for 6.12 #2
- Fix build error in vdso32 when building 64-bit with COMPAT=y and -Os. - Fix build error in pseries EEH when CONFIG_DEBUG_FS is not set. Thanks to: Christophe Leroy, Narayana Murty N, Christian Zigotzky, Ritesh Harjani. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRjvi15rv0TSTaE+SIF0oADX8seIQUCZvPfwQAKCRAF0oADX8se IeqKAPkBZJBXheDywa0aZ1hIKfwB2mWeAMgZLb1AhWeAGpJMBAEA9LtZbM4KhQHG r2JCuHtV7rDyTG04+97V/K4M2iQSsgg= =cygk -----END PGP SIGNATURE----- Merge tag 'powerpc-6.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - Fix build error in vdso32 when building 64-bit with COMPAT=y and -Os - Fix build error in pseries EEH when CONFIG_DEBUG_FS is not set Thanks to Christophe Leroy, Narayana Murty N, Christian Zigotzky, and Ritesh Harjani. * tag 'powerpc-6.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/pseries/eeh: move pseries_eeh_err_inject() outside CONFIG_DEBUG_FS block powerpc/vdso32: Fix use of crtsavres for PPC64
This commit is contained in:
Linus Torvalds
commit
4ffc458083
@ -1574,6 +1574,104 @@ static int proc_eeh_show(struct seq_file *m, void *v)
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}
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#endif /* CONFIG_PROC_FS */
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static int eeh_break_device(struct pci_dev *pdev)
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{
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struct resource *bar = NULL;
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void __iomem *mapped;
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u16 old, bit;
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int i, pos;
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/* Do we have an MMIO BAR to disable? */
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for (i = 0; i <= PCI_STD_RESOURCE_END; i++) {
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struct resource *r = &pdev->resource[i];
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if (!r->flags || !r->start)
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continue;
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if (r->flags & IORESOURCE_IO)
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continue;
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if (r->flags & IORESOURCE_UNSET)
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continue;
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bar = r;
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break;
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}
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if (!bar) {
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pci_err(pdev, "Unable to find Memory BAR to cause EEH with\n");
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return -ENXIO;
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}
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pci_err(pdev, "Going to break: %pR\n", bar);
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if (pdev->is_virtfn) {
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#ifndef CONFIG_PCI_IOV
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return -ENXIO;
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#else
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/*
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* VFs don't have a per-function COMMAND register, so the best
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* we can do is clear the Memory Space Enable bit in the PF's
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* SRIOV control reg.
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*
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* Unfortunately, this requires that we have a PF (i.e doesn't
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* work for a passed-through VF) and it has the potential side
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* effect of also causing an EEH on every other VF under the
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* PF. Oh well.
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*/
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pdev = pdev->physfn;
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if (!pdev)
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return -ENXIO; /* passed through VFs have no PF */
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
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pos += PCI_SRIOV_CTRL;
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bit = PCI_SRIOV_CTRL_MSE;
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#endif /* !CONFIG_PCI_IOV */
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} else {
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bit = PCI_COMMAND_MEMORY;
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pos = PCI_COMMAND;
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}
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/*
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* Process here is:
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*
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* 1. Disable Memory space.
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*
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* 2. Perform an MMIO to the device. This should result in an error
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* (CA / UR) being raised by the device which results in an EEH
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* PE freeze. Using the in_8() accessor skips the eeh detection hook
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* so the freeze hook so the EEH Detection machinery won't be
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* triggered here. This is to match the usual behaviour of EEH
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* where the HW will asynchronously freeze a PE and it's up to
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* the kernel to notice and deal with it.
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*
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* 3. Turn Memory space back on. This is more important for VFs
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* since recovery will probably fail if we don't. For normal
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* the COMMAND register is reset as a part of re-initialising
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* the device.
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*
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* Breaking stuff is the point so who cares if it's racy ;)
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*/
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pci_read_config_word(pdev, pos, &old);
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mapped = ioremap(bar->start, PAGE_SIZE);
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if (!mapped) {
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pci_err(pdev, "Unable to map MMIO BAR %pR\n", bar);
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return -ENXIO;
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}
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pci_write_config_word(pdev, pos, old & ~bit);
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in_8(mapped);
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pci_write_config_word(pdev, pos, old);
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iounmap(mapped);
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return 0;
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}
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int eeh_pe_inject_mmio_error(struct pci_dev *pdev)
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{
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return eeh_break_device(pdev);
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}
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#ifdef CONFIG_DEBUG_FS
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@ -1725,99 +1823,6 @@ static const struct file_operations eeh_dev_check_fops = {
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.read = eeh_debugfs_dev_usage,
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};
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static int eeh_debugfs_break_device(struct pci_dev *pdev)
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{
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struct resource *bar = NULL;
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void __iomem *mapped;
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u16 old, bit;
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int i, pos;
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/* Do we have an MMIO BAR to disable? */
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for (i = 0; i <= PCI_STD_RESOURCE_END; i++) {
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struct resource *r = &pdev->resource[i];
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if (!r->flags || !r->start)
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continue;
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if (r->flags & IORESOURCE_IO)
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continue;
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if (r->flags & IORESOURCE_UNSET)
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continue;
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bar = r;
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break;
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}
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if (!bar) {
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pci_err(pdev, "Unable to find Memory BAR to cause EEH with\n");
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return -ENXIO;
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}
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pci_err(pdev, "Going to break: %pR\n", bar);
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if (pdev->is_virtfn) {
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#ifndef CONFIG_PCI_IOV
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return -ENXIO;
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#else
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/*
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* VFs don't have a per-function COMMAND register, so the best
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* we can do is clear the Memory Space Enable bit in the PF's
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* SRIOV control reg.
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*
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* Unfortunately, this requires that we have a PF (i.e doesn't
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* work for a passed-through VF) and it has the potential side
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* effect of also causing an EEH on every other VF under the
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* PF. Oh well.
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*/
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pdev = pdev->physfn;
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if (!pdev)
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return -ENXIO; /* passed through VFs have no PF */
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
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pos += PCI_SRIOV_CTRL;
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bit = PCI_SRIOV_CTRL_MSE;
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#endif /* !CONFIG_PCI_IOV */
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} else {
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bit = PCI_COMMAND_MEMORY;
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pos = PCI_COMMAND;
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}
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/*
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* Process here is:
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*
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* 1. Disable Memory space.
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*
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* 2. Perform an MMIO to the device. This should result in an error
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* (CA / UR) being raised by the device which results in an EEH
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* PE freeze. Using the in_8() accessor skips the eeh detection hook
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* so the freeze hook so the EEH Detection machinery won't be
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* triggered here. This is to match the usual behaviour of EEH
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* where the HW will asynchronously freeze a PE and it's up to
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* the kernel to notice and deal with it.
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*
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* 3. Turn Memory space back on. This is more important for VFs
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* since recovery will probably fail if we don't. For normal
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* the COMMAND register is reset as a part of re-initialising
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* the device.
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*
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* Breaking stuff is the point so who cares if it's racy ;)
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*/
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pci_read_config_word(pdev, pos, &old);
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mapped = ioremap(bar->start, PAGE_SIZE);
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if (!mapped) {
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pci_err(pdev, "Unable to map MMIO BAR %pR\n", bar);
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return -ENXIO;
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}
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pci_write_config_word(pdev, pos, old & ~bit);
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in_8(mapped);
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pci_write_config_word(pdev, pos, old);
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iounmap(mapped);
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return 0;
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}
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static ssize_t eeh_dev_break_write(struct file *filp,
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const char __user *user_buf,
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size_t count, loff_t *ppos)
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@ -1829,7 +1834,7 @@ static ssize_t eeh_dev_break_write(struct file *filp,
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if (IS_ERR(pdev))
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return PTR_ERR(pdev);
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ret = eeh_debugfs_break_device(pdev);
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ret = eeh_break_device(pdev);
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pci_dev_put(pdev);
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if (ret < 0)
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@ -1844,11 +1849,6 @@ static const struct file_operations eeh_dev_break_fops = {
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.read = eeh_debugfs_dev_usage,
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};
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int eeh_pe_inject_mmio_error(struct pci_dev *pdev)
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{
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return eeh_debugfs_break_device(pdev);
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}
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static ssize_t eeh_dev_can_recover(struct file *filp,
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const char __user *user_buf,
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size_t count, loff_t *ppos)
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@ -46,7 +46,7 @@
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.section ".text"
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#ifndef CONFIG_PPC64
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#ifndef __powerpc64__
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/* Routines for saving integer registers, called by the compiler. */
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/* Called with r11 pointing to the stack header word of the caller of the */
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