dt-bindings: mfd: syscon: Add more simple compatibles
Add another batch of various "simple" syscon compatibles which were undocumented or still documented with old text bindings. Remove the old text binding docs for the ones which were documented. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240603131230.136196-2-robh@kernel.org Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
Rob Herring (Arm)
Lee Jones
parent
9cc3b409be
commit
4c4ade1aba
@ -1,20 +0,0 @@
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Amlogic Meson8 and Meson8b "analog top" registers:
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--------------------------------------------------
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The analog top registers contain information about the so-called
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"metal revision" (which encodes the "minor version") of the SoC.
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Required properties:
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- reg: the register range of the analog top registers
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- compatible: depending on the SoC this should be one of:
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- "amlogic,meson8-analog-top"
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- "amlogic,meson8b-analog-top"
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along with "syscon"
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Example:
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analog_top: analog-top@81a8 {
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compatible = "amlogic,meson8-analog-top", "syscon";
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reg = <0x81a8 0x14>;
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};
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@ -1,17 +0,0 @@
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Amlogic Meson6/Meson8/Meson8b assist registers:
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-----------------------------------------------
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The assist registers contain basic information about the SoC,
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for example the encoded SoC part number.
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Required properties:
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- reg: the register range of the assist registers
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- compatible: should be "amlogic,meson-mx-assist" along with "syscon"
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Example:
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assist: assist@7c00 {
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compatible = "amlogic,meson-mx-assist", "syscon";
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reg = <0x7c00 0x200>;
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};
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@ -1,17 +0,0 @@
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Amlogic Meson6/Meson8/Meson8b bootrom:
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--------------------------------------
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The bootrom register area can be used to access SoC specific
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information, such as the "misc version".
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Required properties:
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- reg: the register range of the bootrom registers
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- compatible: should be "amlogic,meson-mx-bootrom" along with "syscon"
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Example:
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bootrom: bootrom@d9040000 {
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compatible = "amlogic,meson-mx-bootrom", "syscon";
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reg = <0xd9040000 0x10000>;
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};
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@ -1,18 +0,0 @@
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Amlogic Meson8 and Meson8b power-management-unit:
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-------------------------------------------------
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The pmu is used to turn off and on different power domains of the SoCs
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This includes the power to the CPU cores.
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Required node properties:
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- compatible value : depending on the SoC this should be one of:
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"amlogic,meson8-pmu"
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"amlogic,meson8b-pmu"
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- reg : physical base address and the size of the registers window
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Example:
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pmu@c81000e4 {
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compatible = "amlogic,meson8b-pmu", "syscon";
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reg = <0xc81000e0 0x18>;
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};
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@ -41,35 +41,6 @@ Examples:
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reg = <0xffffe800 0x200>;
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};
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RAMC PHY Controller required properties:
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- compatible: Should be "microchip,sama7g5-ddr3phy", "syscon"
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- reg: Should contain registers location and length
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Example:
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ddr3phy: ddr3phy@e3804000 {
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compatible = "microchip,sama7g5-ddr3phy", "syscon";
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reg = <0xe3804000 0x1000>;
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};
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Special Function Registers (SFR)
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Special Function Registers (SFR) manage specific aspects of the integrated
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memory, bridge implementations, processor and other functionality not controlled
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elsewhere.
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required properties:
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- compatible: Should be "atmel,<chip>-sfr", "syscon" or
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"atmel,<chip>-sfrbu", "syscon"
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<chip> can be "sama5d3", "sama5d4" or "sama5d2".
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It also can be "microchip,sam9x60-sfr", "syscon".
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- reg: Should contain registers location and length
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sfr@f0038000 {
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compatible = "atmel,sama5d3-sfr", "syscon";
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reg = <0xf0038000 0x60>;
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};
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Security Module (SECUMOD)
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The Security Module macrocell provides all necessary secure functions to avoid
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@ -7,22 +7,6 @@ ARTPEC-6 ARM SoC
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Required root node properties:
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- compatible = "axis,artpec6";
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ARTPEC-6 System Controller
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--------------------------
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The ARTPEC-6 has a system controller with mixed functions controlling DMA, PCIe
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and resets.
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Required properties:
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- compatible: "axis,artpec6-syscon", "syscon"
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- reg: Address and length of the register bank.
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Example:
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syscon {
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compatible = "axis,artpec6-syscon", "syscon";
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reg = <0xf8000000 0x48>;
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};
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ARTPEC-6 Development board:
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---------------------------
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Required root node properties:
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@ -27,16 +27,6 @@ Properties:
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- reg : Offset and length of the register set for the device
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* Alpine System-Fabric Service Registers
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The System-Fabric Service Registers allow various operation on CPU and
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system fabric, like powering CPUs off.
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Properties:
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- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
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- reg : Offset and length of the register set for the device
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Example:
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cpus {
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@ -1,14 +0,0 @@
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Freescale Vybrid Miscellaneous System Control - CPU Configuration
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The MSCM IP contains multiple sub modules, this binding describes the first
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block of registers which contains CPU configuration information.
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Required properties:
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- compatible: "fsl,vf610-mscm-cpucfg", "syscon"
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- reg: the register range of the MSCM CPU configuration registers
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Example:
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mscm_cpucfg: cpucfg@40001000 {
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compatible = "fsl,vf610-mscm-cpucfg", "syscon";
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reg = <0x40001000 0x800>;
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}
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@ -5,18 +5,3 @@ Boards with a Marvell Dove SoC shall have the following properties:
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Required root node property:
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- compatible: must contain "marvell,dove";
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* Global Configuration registers
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Global Configuration registers of Dove SoC are shared by a syscon node.
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Required properties:
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- compatible: must contain "marvell,dove-global-config" and "syscon".
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- reg: base address and size of the Global Configuration registers.
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Example:
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gconf: global-config@e802c {
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compatible = "marvell,dove-global-config", "syscon";
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reg = <0xe802c 0x14>;
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};
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@ -1,9 +0,0 @@
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SPEAr Misc configuration
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===========================
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SPEAr SOCs have some miscellaneous registers which are used to configure
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few properties of different peripheral controllers.
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misc node required properties:
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- compatible Should be "st,spear1340-misc", "syscon".
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- reg: Address range of misc space up to 8K
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@ -1,20 +0,0 @@
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* Device tree bindings for Texas Instruments keystone pll controller
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The main pll controller used to drive theC66x CorePacs, the switch fabric,
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and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
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the NETCP modules) requires a PLL Controller to manage the various clock
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divisions, gating, and synchronization.
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Required properties:
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- compatible: "ti,keystone-pllctrl", "syscon"
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- reg: contains offset/length value for pll controller
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registers space.
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Example:
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pllctrl: pll-controller@02310000 {
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compatible = "ti,keystone-pllctrl", "syscon";
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reg = <0x02310000 0x200>;
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};
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@ -34,35 +34,58 @@ properties:
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anyOf:
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- items:
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- enum:
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- al,alpine-sysfabric-service
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- allwinner,sun8i-a83t-system-controller
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- allwinner,sun8i-h3-system-controller
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- allwinner,sun8i-v3s-system-controller
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- allwinner,sun50i-a64-system-controller
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- altr,l3regs
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- altr,sdr-ctl
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- amd,pensando-elba-syscon
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- amlogic,meson-mx-assist
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- amlogic,meson-mx-bootrom
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- amlogic,meson8-analog-top
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- amlogic,meson8b-analog-top
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- amlogic,meson8-pmu
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- amlogic,meson8b-pmu
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- apm,xgene-csw
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- apm,xgene-efuse
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- apm,xgene-mcb
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- apm,xgene-rb
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- apm,xgene-scu
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- atmel,sama5d2-sfrbu
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- atmel,sama5d3-nfc-io
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- atmel,sama5d3-sfrbu
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- atmel,sama5d4-sfrbu
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- axis,artpec6-syscon
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- brcm,cru-clkset
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- brcm,sr-cdru
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- brcm,sr-mhb
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- cirrus,ep7209-syscon1
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- cirrus,ep7209-syscon2
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- cirrus,ep7209-syscon3
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- cnxt,cx92755-uc
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- freecom,fsg-cs2-system-controller
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- fsl,imx93-aonmix-ns-syscfg
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- fsl,imx93-wakeupmix-syscfg
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- fsl,ls1088a-reset
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- fsl,vf610-anatop
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- fsl,vf610-mscm-cpucfg
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- hisilicon,dsa-subctrl
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- hisilicon,hi6220-sramctrl
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- hisilicon,hip04-ppe
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- hisilicon,pcie-sas-subctrl
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- hisilicon,peri-subctrl
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- hpe,gxp-sysreg
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- loongson,ls1b-syscon
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- loongson,ls1c-syscon
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- lsi,axxia-syscon
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- marvell,armada-3700-cpu-misc
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- marvell,armada-3700-nb-pm
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- marvell,armada-3700-avs
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- marvell,armada-3700-usb2-host-misc
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- marvell,dove-global-config
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- mediatek,mt2701-pctl-a-syscfg
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- mediatek,mt2712-pctl-a-syscfg
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- mediatek,mt6397-pctl-pmic-syscfg
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- mediatek,mt8135-pctl-a-syscfg
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@ -70,6 +93,9 @@ properties:
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- mediatek,mt8173-pctl-a-syscfg
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- mediatek,mt8365-syscfg
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- microchip,lan966x-cpu-syscon
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- microchip,sam9x60-sfr
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- microchip,sama7g5-ddr3phy
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- mscc,ocelot-cpu-syscon
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- mstar,msc313-pmsleep
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- nuvoton,ma35d1-sys
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- nuvoton,wpcm450-shm
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@ -84,12 +110,15 @@ properties:
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- rockchip,rk3568-qos
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- rockchip,rk3588-qos
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- rockchip,rv1126-qos
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- st,spear1340-misc
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- stericsson,nomadik-pmu
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- starfive,jh7100-sysmain
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- ti,am62-usb-phy-ctrl
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- ti,am625-dss-oldi-io-ctrl
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- ti,am62p-cpsw-mac-efuse
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- ti,am654-dss-oldi-io-ctrl
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- ti,j784s4-pcie-ctrl
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- ti,keystone-pllctrl
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- const: syscon
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@ -25,23 +25,6 @@ Example:
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reg = <0x71070000 0x1c>;
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};
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o CPU system control:
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The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of
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the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU
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endianness, CPU bus control, CPU status.
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Required properties:
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- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
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- reg : Should contain registers location and length
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Example:
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syscon@70000000 {
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compatible = "mscc,ocelot-cpu-syscon", "syscon";
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reg = <0x70000000 0x2c>;
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};
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o HSIO regs:
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The SoC has a few registers (HSIO) handling miscellaneous functionalities:
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@ -60,15 +60,6 @@ Required properties:
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- reg: should contain 2 register ranges. The first one is pointing to the PMECC
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block, and the second one to the PMECC_ERRLOC block.
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* SAMA5 NFC I/O bindings:
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SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page
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operations. This interface to this logic is placed in a separate I/O range and
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should thus have its own DT node.
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- compatible: should be "atmel,sama5d3-nfc-io", "syscon".
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- reg: should contain the I/O range used to interact with the NFC logic.
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Example:
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nfc_io: nfc-io@70000000 {
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@ -19,16 +19,6 @@ Optional properties:
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[1] Documentation/devicetree/bindings/net/ethernet.txt
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* Ethernet ppe node:
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Control rx & tx fifos of all ethernet controllers.
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Have 2048 recv channels shared by all ethernet controllers, only if no overlap.
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Each controller's recv channel start from channel * number (RX_DESC_NUM).
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Required properties:
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- compatible: "hisilicon,hip04-ppe", "syscon".
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- reg: address and length of the register set for the device.
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* MDIO bus node:
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Required properties:
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