perf/x86/uncore: Correct the number of CHAs on SPR
The number of CHAs from the discovery table on some SPR variants is
incorrect, because of a firmware issue. An accurate number can be read
from the MSR UNC_CBO_CONFIG.
Fixes: 949b11381f
("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
Reported-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Stephane Eranian <eranian@google.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230508140206.283708-1-kan.liang@linux.intel.com
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@ -6150,6 +6150,7 @@ static struct intel_uncore_type spr_uncore_mdf = {
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};
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#define UNCORE_SPR_NUM_UNCORE_TYPES 12
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#define UNCORE_SPR_CHA 0
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#define UNCORE_SPR_IIO 1
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#define UNCORE_SPR_IMC 6
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#define UNCORE_SPR_UPI 8
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@ -6460,12 +6461,22 @@ static int uncore_type_max_boxes(struct intel_uncore_type **types,
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return max + 1;
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}
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#define SPR_MSR_UNC_CBO_CONFIG 0x2FFE
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void spr_uncore_cpu_init(void)
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{
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struct intel_uncore_type *type;
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u64 num_cbo;
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uncore_msr_uncores = uncore_get_uncores(UNCORE_ACCESS_MSR,
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UNCORE_SPR_MSR_EXTRA_UNCORES,
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spr_msr_uncores);
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type = uncore_find_type_by_id(uncore_msr_uncores, UNCORE_SPR_CHA);
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if (type) {
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rdmsrl(SPR_MSR_UNC_CBO_CONFIG, num_cbo);
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type->num_boxes = num_cbo;
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}
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spr_uncore_iio_free_running.num_boxes = uncore_type_max_boxes(uncore_msr_uncores, UNCORE_SPR_IIO);
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}
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