perf tools fixes for v6.7: 1st batch
Assorted build fixes including: - fix compile errors in printf() with u64 on 32-bit systesm - sync kernel headers to the tool copies - update arm64 sysreg generation for tarballs - disable compile warnings on __packed attribute Signed-off-by: Namhyung Kim <namhyung@kernel.org> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSo2x5BnqMqsoHtzsmMstVUGiXMgwUCZWeIvwAKCRCMstVUGiXM g1CxAQCdshHRFs3xWv8RghzMRyu1V0FUHQnwoHJAsOYc4OmpXAD+NPfJVTy4OPSc VBhtHhZxHML1XJU/rVFyqHS5oM5xxwg= =lr0S -----END PGP SIGNATURE----- Merge tag 'perf-tools-fixes-for-v6.7-1-2023-11-29' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools Pull perf tools fixes from Namhyung Kim: "Assorted build fixes including: - fix compile errors in printf() with u64 on 32-bit systesm - sync kernel headers to the tool copies - update arm64 sysreg generation for tarballs - disable compile warnings on __packed attribute" * tag 'perf-tools-fixes-for-v6.7-1-2023-11-29' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools: tools: Disable __packed attribute compiler warning due to -Werror=attributes perf build: Ensure sysreg-defs Makefile respects output dir tools perf: Add arm64 sysreg files to MANIFEST tools/perf: Update tools's copy of mips syscall table tools/perf: Update tools's copy of s390 syscall table tools/perf: Update tools's copy of powerpc syscall table tools/perf: Update tools's copy of x86 syscall table tools headers: Update tools's copy of s390/asm headers tools headers: Update tools's copy of arm64/asm headers tools headers: Update tools's copy of x86/asm headers tools headers: Update tools's copy of socket.h header tools headers UAPI: Update tools's copy of unistd.h header tools headers UAPI: Update tools's copy of vhost.h header tools headers UAPI: Update tools's copy of mount.h header tools headers UAPI: Update tools's copy of kvm.h header tools headers UAPI: Update tools's copy of fscrypt.h header tools headers UAPI: Update tools's copy of drm headers perf lock contention: Fix a build error on 32-bit perf kwork: Fix a build error on 32-bit
This commit is contained in:
commit
2594faafee
@ -79,13 +79,15 @@
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#define ARM_CPU_PART_CORTEX_A78AE 0xD42
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#define ARM_CPU_PART_CORTEX_X1 0xD44
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#define ARM_CPU_PART_CORTEX_A510 0xD46
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#define ARM_CPU_PART_CORTEX_A520 0xD80
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#define ARM_CPU_PART_CORTEX_A710 0xD47
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#define ARM_CPU_PART_CORTEX_A715 0xD4D
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#define ARM_CPU_PART_CORTEX_X2 0xD48
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#define ARM_CPU_PART_NEOVERSE_N2 0xD49
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#define ARM_CPU_PART_CORTEX_A78C 0xD4B
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#define APM_CPU_PART_POTENZA 0x000
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#define APM_CPU_PART_XGENE 0x000
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#define APM_CPU_VAR_POTENZA 0x00
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#define CAVIUM_CPU_PART_THUNDERX 0x0A1
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#define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2
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@ -148,6 +150,7 @@
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#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)
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#define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)
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#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
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#define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520)
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#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
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#define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715)
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#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
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@ -505,6 +505,38 @@ struct kvm_smccc_filter {
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#define KVM_HYPERCALL_EXIT_SMC (1U << 0)
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#define KVM_HYPERCALL_EXIT_16BIT (1U << 1)
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/*
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* Get feature ID registers userspace writable mask.
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*
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* From DDI0487J.a, D19.2.66 ("ID_AA64MMFR2_EL1, AArch64 Memory Model
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* Feature Register 2"):
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*
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* "The Feature ID space is defined as the System register space in
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* AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7},
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* op2=={0-7}."
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*
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* This covers all currently known R/O registers that indicate
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* anything useful feature wise, including the ID registers.
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*
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* If we ever need to introduce a new range, it will be described as
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* such in the range field.
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*/
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#define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
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({ \
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__u64 __op1 = (op1) & 3; \
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__op1 -= (__op1 == 3); \
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(__op1 << 6 | ((crm) & 7) << 3 | (op2)); \
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})
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#define KVM_ARM_FEATURE_ID_RANGE 0
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#define KVM_ARM_FEATURE_ID_RANGE_SIZE (3 * 8 * 8)
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struct reg_mask_range {
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__u64 addr; /* Pointer to mask array */
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__u32 range; /* Requested range */
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__u32 reserved[13];
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};
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#endif
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#endif /* __ARM_KVM_H__ */
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@ -36,11 +36,13 @@ enum perf_event_arm_regs {
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PERF_REG_ARM64_LR,
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PERF_REG_ARM64_SP,
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PERF_REG_ARM64_PC,
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PERF_REG_ARM64_MAX,
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/* Extended/pseudo registers */
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PERF_REG_ARM64_VG = 46, // SVE Vector Granule
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PERF_REG_ARM64_MAX = PERF_REG_ARM64_PC + 1,
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PERF_REG_ARM64_EXTENDED_MAX = PERF_REG_ARM64_VG + 1
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PERF_REG_ARM64_VG = 46, /* SVE Vector Granule */
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PERF_REG_ARM64_EXTENDED_MAX
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};
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#define PERF_REG_EXTENDED_MASK (1ULL << PERF_REG_ARM64_VG)
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#endif /* _ASM_ARM64_PERF_REGS_H */
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|
@ -22,7 +22,7 @@ endif
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arm64_tools_dir = $(top_srcdir)/arch/arm64/tools
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arm64_sysreg_tbl = $(arm64_tools_dir)/sysreg
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arm64_gen_sysreg = $(arm64_tools_dir)/gen-sysreg.awk
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arm64_generated_dir = $(top_srcdir)/tools/arch/arm64/include/generated
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arm64_generated_dir = $(OUTPUT)arch/arm64/include/generated
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arm64_sysreg_defs = $(arm64_generated_dir)/asm/sysreg-defs.h
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all: $(arm64_sysreg_defs)
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@ -159,6 +159,22 @@ struct kvm_s390_vm_cpu_subfunc {
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__u8 reserved[1728];
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};
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#define KVM_S390_VM_CPU_PROCESSOR_UV_FEAT_GUEST 6
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#define KVM_S390_VM_CPU_MACHINE_UV_FEAT_GUEST 7
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#define KVM_S390_VM_CPU_UV_FEAT_NR_BITS 64
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struct kvm_s390_vm_cpu_uv_feat {
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union {
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struct {
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__u64 : 4;
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__u64 ap : 1; /* bit 4 */
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__u64 ap_intr : 1; /* bit 5 */
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__u64 : 58;
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};
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__u64 feat;
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};
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};
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/* kvm attributes for crypto */
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#define KVM_S390_VM_CRYPTO_ENABLE_AES_KW 0
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#define KVM_S390_VM_CRYPTO_ENABLE_DEA_KW 1
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|
@ -198,7 +198,6 @@
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#define X86_FEATURE_CAT_L3 ( 7*32+ 4) /* Cache Allocation Technology L3 */
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#define X86_FEATURE_CAT_L2 ( 7*32+ 5) /* Cache Allocation Technology L2 */
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#define X86_FEATURE_CDP_L3 ( 7*32+ 6) /* Code and Data Prioritization L3 */
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#define X86_FEATURE_INVPCID_SINGLE ( 7*32+ 7) /* Effectively INVPCID && CR4.PCIDE=1 */
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#define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */
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#define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
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#define X86_FEATURE_XCOMPACTED ( 7*32+10) /* "" Use compacted XSTATE (XSAVES or XSAVEC) */
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@ -308,6 +307,11 @@
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#define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */
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#define X86_FEATURE_SMBA (11*32+21) /* "" Slow Memory Bandwidth Allocation */
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#define X86_FEATURE_BMEC (11*32+22) /* "" Bandwidth Monitoring Event Configuration */
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#define X86_FEATURE_USER_SHSTK (11*32+23) /* Shadow stack support for user mode applications */
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#define X86_FEATURE_SRSO (11*32+24) /* "" AMD BTB untrain RETs */
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#define X86_FEATURE_SRSO_ALIAS (11*32+25) /* "" AMD BTB untrain RETs through aliasing */
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#define X86_FEATURE_IBPB_ON_VMEXIT (11*32+26) /* "" Issue an IBPB only on VMEXIT */
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/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
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#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
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@ -380,6 +384,7 @@
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#define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */
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#define X86_FEATURE_WAITPKG (16*32+ 5) /* UMONITOR/UMWAIT/TPAUSE Instructions */
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#define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */
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#define X86_FEATURE_SHSTK (16*32+ 7) /* "" Shadow stack */
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#define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New Instructions */
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#define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */
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#define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */
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@ -438,11 +443,16 @@
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/* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */
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#define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" No Nested Data Breakpoints */
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#define X86_FEATURE_WRMSR_XX_BASE_NS (20*32+ 1) /* "" WRMSR to {FS,GS,KERNEL_GS}_BASE is non-serializing */
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#define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */
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#define X86_FEATURE_NULL_SEL_CLR_BASE (20*32+ 6) /* "" Null Selector Clears Base */
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#define X86_FEATURE_AUTOIBRS (20*32+ 8) /* "" Automatic IBRS */
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#define X86_FEATURE_NO_SMM_CTL_MSR (20*32+ 9) /* "" SMM_CTL MSR is not present */
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#define X86_FEATURE_SBPB (20*32+27) /* "" Selective Branch Prediction Barrier */
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#define X86_FEATURE_IBPB_BRTYPE (20*32+28) /* "" MSR_PRED_CMD[IBPB] flushes all branch type predictions */
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#define X86_FEATURE_SRSO_NO (20*32+29) /* "" CPU is not affected by SRSO */
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/*
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* BUG word(s)
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*/
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@ -484,5 +494,9 @@
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#define X86_BUG_RETBLEED X86_BUG(27) /* CPU is affected by RETBleed */
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#define X86_BUG_EIBRS_PBRSB X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */
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#define X86_BUG_SMT_RSB X86_BUG(29) /* CPU is vulnerable to Cross-Thread Return Address Predictions */
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#define X86_BUG_GDS X86_BUG(30) /* CPU is affected by Gather Data Sampling */
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/* BUG word 2 */
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#define X86_BUG_SRSO X86_BUG(1*32 + 0) /* AMD SRSO bug */
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#define X86_BUG_DIV0 X86_BUG(1*32 + 1) /* AMD DIV0 speculation bug */
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#endif /* _ASM_X86_CPUFEATURES_H */
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|
@ -105,6 +105,18 @@
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# define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31))
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#endif
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#ifdef CONFIG_X86_USER_SHADOW_STACK
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#define DISABLE_USER_SHSTK 0
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#else
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#define DISABLE_USER_SHSTK (1 << (X86_FEATURE_USER_SHSTK & 31))
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#endif
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#ifdef CONFIG_X86_KERNEL_IBT
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#define DISABLE_IBT 0
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#else
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#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
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#endif
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/*
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* Make sure to add features to the correct mask
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*/
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@ -120,7 +132,7 @@
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#define DISABLED_MASK9 (DISABLE_SGX)
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#define DISABLED_MASK10 0
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#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
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DISABLE_CALL_DEPTH_TRACKING)
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DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
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#define DISABLED_MASK12 (DISABLE_LAM)
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#define DISABLED_MASK13 0
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#define DISABLED_MASK14 0
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@ -128,7 +140,7 @@
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#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
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DISABLE_ENQCMD)
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#define DISABLED_MASK17 0
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#define DISABLED_MASK18 0
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#define DISABLED_MASK18 (DISABLE_IBT)
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#define DISABLED_MASK19 0
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#define DISABLED_MASK20 0
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#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21)
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|
@ -222,6 +222,7 @@
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#define MSR_INTEGRITY_CAPS_ARRAY_BIST BIT(MSR_INTEGRITY_CAPS_ARRAY_BIST_BIT)
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#define MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT 4
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#define MSR_INTEGRITY_CAPS_PERIODIC_BIST BIT(MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT)
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#define MSR_INTEGRITY_CAPS_SAF_GEN_MASK GENMASK_ULL(10, 9)
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|
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#define MSR_LBR_NHM_FROM 0x00000680
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#define MSR_LBR_NHM_TO 0x000006c0
|
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@ -553,6 +554,7 @@
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#define MSR_AMD64_CPUID_FN_1 0xc0011004
|
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#define MSR_AMD64_LS_CFG 0xc0011020
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#define MSR_AMD64_DC_CFG 0xc0011022
|
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#define MSR_AMD64_TW_CFG 0xc0011023
|
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|
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#define MSR_AMD64_DE_CFG 0xc0011029
|
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#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1
|
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@ -637,12 +639,21 @@
|
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/* AMD Last Branch Record MSRs */
|
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#define MSR_AMD64_LBR_SELECT 0xc000010e
|
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|
||||
/* Zen4 */
|
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#define MSR_ZEN4_BP_CFG 0xc001102e
|
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#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
|
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|
||||
/* Fam 19h MSRs */
|
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#define MSR_F19H_UMC_PERF_CTL 0xc0010800
|
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#define MSR_F19H_UMC_PERF_CTR 0xc0010801
|
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|
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/* Zen 2 */
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#define MSR_ZEN2_SPECTRAL_CHICKEN 0xc00110e3
|
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#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT BIT_ULL(1)
|
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|
||||
/* Fam 17h MSRs */
|
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#define MSR_F17H_IRPERF 0xc00000e9
|
||||
|
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#define MSR_ZEN2_SPECTRAL_CHICKEN 0xc00110e3
|
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#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT BIT_ULL(1)
|
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|
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/* Fam 16h MSRs */
|
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#define MSR_F16H_L2I_PERF_CTL 0xc0010230
|
||||
#define MSR_F16H_L2I_PERF_CTR 0xc0010231
|
||||
@ -1112,12 +1123,16 @@
|
||||
#define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14)
|
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#define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29)
|
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#define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE 0x1F
|
||||
/* AMD-V MSRs */
|
||||
|
||||
/* AMD-V MSRs */
|
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#define MSR_VM_CR 0xc0010114
|
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#define MSR_VM_IGNNE 0xc0010115
|
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#define MSR_VM_HSAVE_PA 0xc0010117
|
||||
|
||||
#define SVM_VM_CR_VALID_MASK 0x001fULL
|
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#define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL
|
||||
#define SVM_VM_CR_SVM_DIS_MASK 0x0010ULL
|
||||
|
||||
/* Hardware Feedback Interface */
|
||||
#define MSR_IA32_HW_FEEDBACK_PTR 0x17d0
|
||||
#define MSR_IA32_HW_FEEDBACK_CONFIG 0x17d1
|
||||
|
@ -23,9 +23,21 @@
|
||||
#define ARCH_MAP_VDSO_32 0x2002
|
||||
#define ARCH_MAP_VDSO_64 0x2003
|
||||
|
||||
/* Don't use 0x3001-0x3004 because of old glibcs */
|
||||
|
||||
#define ARCH_GET_UNTAG_MASK 0x4001
|
||||
#define ARCH_ENABLE_TAGGED_ADDR 0x4002
|
||||
#define ARCH_GET_MAX_TAG_BITS 0x4003
|
||||
#define ARCH_FORCE_TAGGED_SVA 0x4004
|
||||
|
||||
#define ARCH_SHSTK_ENABLE 0x5001
|
||||
#define ARCH_SHSTK_DISABLE 0x5002
|
||||
#define ARCH_SHSTK_LOCK 0x5003
|
||||
#define ARCH_SHSTK_UNLOCK 0x5004
|
||||
#define ARCH_SHSTK_STATUS 0x5005
|
||||
|
||||
/* ARCH_SHSTK_ features bits */
|
||||
#define ARCH_SHSTK_SHSTK (1ULL << 0)
|
||||
#define ARCH_SHSTK_WRSS (1ULL << 1)
|
||||
|
||||
#endif /* _ASM_X86_PRCTL_H */
|
||||
|
@ -8,6 +8,7 @@
|
||||
*/
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpacked"
|
||||
#pragma GCC diagnostic ignored "-Wattributes"
|
||||
|
||||
#define __get_unaligned_t(type, ptr) ({ \
|
||||
const struct { type x; } __packed *__pptr = (typeof(__pptr))(ptr); \
|
||||
|
@ -816,15 +816,21 @@ __SYSCALL(__NR_process_mrelease, sys_process_mrelease)
|
||||
__SYSCALL(__NR_futex_waitv, sys_futex_waitv)
|
||||
#define __NR_set_mempolicy_home_node 450
|
||||
__SYSCALL(__NR_set_mempolicy_home_node, sys_set_mempolicy_home_node)
|
||||
|
||||
#define __NR_cachestat 451
|
||||
__SYSCALL(__NR_cachestat, sys_cachestat)
|
||||
|
||||
#define __NR_fchmodat2 452
|
||||
__SYSCALL(__NR_fchmodat2, sys_fchmodat2)
|
||||
#define __NR_map_shadow_stack 453
|
||||
__SYSCALL(__NR_map_shadow_stack, sys_map_shadow_stack)
|
||||
#define __NR_futex_wake 454
|
||||
__SYSCALL(__NR_futex_wake, sys_futex_wake)
|
||||
#define __NR_futex_wait 455
|
||||
__SYSCALL(__NR_futex_wait, sys_futex_wait)
|
||||
#define __NR_futex_requeue 456
|
||||
__SYSCALL(__NR_futex_requeue, sys_futex_requeue)
|
||||
|
||||
#undef __NR_syscalls
|
||||
#define __NR_syscalls 453
|
||||
#define __NR_syscalls 457
|
||||
|
||||
/*
|
||||
* 32 bit systems traditionally used different
|
||||
|
@ -1134,6 +1134,26 @@ extern "C" {
|
||||
#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
|
||||
#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_MODE_CREATE_DUMB - Create a new dumb buffer object.
|
||||
*
|
||||
* KMS dumb buffers provide a very primitive way to allocate a buffer object
|
||||
* suitable for scanout and map it for software rendering. KMS dumb buffers are
|
||||
* not suitable for hardware-accelerated rendering nor video decoding. KMS dumb
|
||||
* buffers are not suitable to be displayed on any other device than the KMS
|
||||
* device where they were allocated from. Also see
|
||||
* :ref:`kms_dumb_buffer_objects`.
|
||||
*
|
||||
* The IOCTL argument is a struct drm_mode_create_dumb.
|
||||
*
|
||||
* User-space is expected to create a KMS dumb buffer via this IOCTL, then add
|
||||
* it as a KMS framebuffer via &DRM_IOCTL_MODE_ADDFB and map it via
|
||||
* &DRM_IOCTL_MODE_MAP_DUMB.
|
||||
*
|
||||
* &DRM_CAP_DUMB_BUFFER indicates whether this IOCTL is supported.
|
||||
* &DRM_CAP_DUMB_PREFERRED_DEPTH and &DRM_CAP_DUMB_PREFER_SHADOW indicate
|
||||
* driver preferences for dumb buffers.
|
||||
*/
|
||||
#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
|
||||
#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
|
||||
#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
|
||||
|
@ -38,13 +38,13 @@ extern "C" {
|
||||
*/
|
||||
|
||||
/**
|
||||
* DOC: uevents generated by i915 on it's device node
|
||||
* DOC: uevents generated by i915 on its device node
|
||||
*
|
||||
* I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
|
||||
* event from the gpu l3 cache. Additional information supplied is ROW,
|
||||
* event from the GPU L3 cache. Additional information supplied is ROW,
|
||||
* BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep
|
||||
* track of these events and if a specific cache-line seems to have a
|
||||
* persistent error remap it with the l3 remapping tool supplied in
|
||||
* track of these events, and if a specific cache-line seems to have a
|
||||
* persistent error, remap it with the L3 remapping tool supplied in
|
||||
* intel-gpu-tools. The value supplied with the event is always 1.
|
||||
*
|
||||
* I915_ERROR_UEVENT - Generated upon error detection, currently only via
|
||||
|
@ -71,7 +71,8 @@ struct fscrypt_policy_v2 {
|
||||
__u8 contents_encryption_mode;
|
||||
__u8 filenames_encryption_mode;
|
||||
__u8 flags;
|
||||
__u8 __reserved[4];
|
||||
__u8 log2_data_unit_size;
|
||||
__u8 __reserved[3];
|
||||
__u8 master_key_identifier[FSCRYPT_KEY_IDENTIFIER_SIZE];
|
||||
};
|
||||
|
||||
|
@ -264,6 +264,7 @@ struct kvm_xen_exit {
|
||||
#define KVM_EXIT_RISCV_SBI 35
|
||||
#define KVM_EXIT_RISCV_CSR 36
|
||||
#define KVM_EXIT_NOTIFY 37
|
||||
#define KVM_EXIT_LOONGARCH_IOCSR 38
|
||||
|
||||
/* For KVM_EXIT_INTERNAL_ERROR */
|
||||
/* Emulate instruction failed. */
|
||||
@ -336,6 +337,13 @@ struct kvm_run {
|
||||
__u32 len;
|
||||
__u8 is_write;
|
||||
} mmio;
|
||||
/* KVM_EXIT_LOONGARCH_IOCSR */
|
||||
struct {
|
||||
__u64 phys_addr;
|
||||
__u8 data[8];
|
||||
__u32 len;
|
||||
__u8 is_write;
|
||||
} iocsr_io;
|
||||
/* KVM_EXIT_HYPERCALL */
|
||||
struct {
|
||||
__u64 nr;
|
||||
@ -1192,6 +1200,7 @@ struct kvm_ppc_resize_hpt {
|
||||
#define KVM_CAP_COUNTER_OFFSET 227
|
||||
#define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228
|
||||
#define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229
|
||||
#define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230
|
||||
|
||||
#ifdef KVM_CAP_IRQ_ROUTING
|
||||
|
||||
@ -1362,6 +1371,7 @@ struct kvm_dirty_tlb {
|
||||
#define KVM_REG_ARM64 0x6000000000000000ULL
|
||||
#define KVM_REG_MIPS 0x7000000000000000ULL
|
||||
#define KVM_REG_RISCV 0x8000000000000000ULL
|
||||
#define KVM_REG_LOONGARCH 0x9000000000000000ULL
|
||||
|
||||
#define KVM_REG_SIZE_SHIFT 52
|
||||
#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL
|
||||
@ -1418,9 +1428,16 @@ struct kvm_device_attr {
|
||||
__u64 addr; /* userspace address of attr data */
|
||||
};
|
||||
|
||||
#define KVM_DEV_VFIO_GROUP 1
|
||||
#define KVM_DEV_VFIO_GROUP_ADD 1
|
||||
#define KVM_DEV_VFIO_GROUP_DEL 2
|
||||
#define KVM_DEV_VFIO_FILE 1
|
||||
|
||||
#define KVM_DEV_VFIO_FILE_ADD 1
|
||||
#define KVM_DEV_VFIO_FILE_DEL 2
|
||||
|
||||
/* KVM_DEV_VFIO_GROUP aliases are for compile time uapi compatibility */
|
||||
#define KVM_DEV_VFIO_GROUP KVM_DEV_VFIO_FILE
|
||||
|
||||
#define KVM_DEV_VFIO_GROUP_ADD KVM_DEV_VFIO_FILE_ADD
|
||||
#define KVM_DEV_VFIO_GROUP_DEL KVM_DEV_VFIO_FILE_DEL
|
||||
#define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3
|
||||
|
||||
enum kvm_device_type {
|
||||
@ -1555,6 +1572,7 @@ struct kvm_s390_ucas_mapping {
|
||||
#define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags)
|
||||
/* Available with KVM_CAP_COUNTER_OFFSET */
|
||||
#define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset)
|
||||
#define KVM_ARM_GET_REG_WRITABLE_MASKS _IOR(KVMIO, 0xb6, struct reg_mask_range)
|
||||
|
||||
/* ioctl for vm fd */
|
||||
#define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device)
|
||||
|
@ -100,8 +100,9 @@ enum fsconfig_command {
|
||||
FSCONFIG_SET_PATH = 3, /* Set parameter, supplying an object by path */
|
||||
FSCONFIG_SET_PATH_EMPTY = 4, /* Set parameter, supplying an object by (empty) path */
|
||||
FSCONFIG_SET_FD = 5, /* Set parameter, supplying an object by fd */
|
||||
FSCONFIG_CMD_CREATE = 6, /* Invoke superblock creation */
|
||||
FSCONFIG_CMD_CREATE = 6, /* Create new or reuse existing superblock */
|
||||
FSCONFIG_CMD_RECONFIGURE = 7, /* Invoke superblock reconfiguration */
|
||||
FSCONFIG_CMD_CREATE_EXCL = 8, /* Create new superblock, fail if reusing existing superblock */
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -219,4 +219,12 @@
|
||||
*/
|
||||
#define VHOST_VDPA_RESUME _IO(VHOST_VIRTIO, 0x7E)
|
||||
|
||||
/* Get the group for the descriptor table including driver & device areas
|
||||
* of a virtqueue: read index, write group in num.
|
||||
* The virtqueue index is stored in the index field of vhost_vring_state.
|
||||
* The group ID of the descriptor table for this specific virtqueue
|
||||
* is returned via num field of vhost_vring_state.
|
||||
*/
|
||||
#define VHOST_VDPA_GET_VRING_DESC_GROUP _IOWR(VHOST_VIRTIO, 0x7F, \
|
||||
struct vhost_vring_state)
|
||||
#endif
|
||||
|
@ -1,3 +1,5 @@
|
||||
arch/arm64/tools/gen-sysreg.awk
|
||||
arch/arm64/tools/sysreg
|
||||
tools/perf
|
||||
tools/arch
|
||||
tools/scripts
|
||||
|
@ -434,6 +434,21 @@ export INSTALL SHELL_PATH
|
||||
|
||||
SHELL = $(SHELL_PATH)
|
||||
|
||||
arm64_gen_sysreg_dir := $(srctree)/tools/arch/arm64/tools
|
||||
ifneq ($(OUTPUT),)
|
||||
arm64_gen_sysreg_outdir := $(OUTPUT)
|
||||
else
|
||||
arm64_gen_sysreg_outdir := $(CURDIR)
|
||||
endif
|
||||
|
||||
arm64-sysreg-defs: FORCE
|
||||
$(Q)$(MAKE) -C $(arm64_gen_sysreg_dir) O=$(arm64_gen_sysreg_outdir)
|
||||
|
||||
arm64-sysreg-defs-clean:
|
||||
$(call QUIET_CLEAN,arm64-sysreg-defs)
|
||||
$(Q)$(MAKE) -C $(arm64_gen_sysreg_dir) O=$(arm64_gen_sysreg_outdir) \
|
||||
clean > /dev/null
|
||||
|
||||
beauty_linux_dir := $(srctree)/tools/perf/trace/beauty/include/linux/
|
||||
linux_uapi_dir := $(srctree)/tools/include/uapi/linux
|
||||
asm_generic_uapi_dir := $(srctree)/tools/include/uapi/asm-generic
|
||||
@ -450,15 +465,6 @@ drm_ioctl_tbl := $(srctree)/tools/perf/trace/beauty/drm_ioctl.sh
|
||||
# Create output directory if not already present
|
||||
_dummy := $(shell [ -d '$(beauty_ioctl_outdir)' ] || mkdir -p '$(beauty_ioctl_outdir)')
|
||||
|
||||
arm64_gen_sysreg_dir := $(srctree)/tools/arch/arm64/tools
|
||||
|
||||
arm64-sysreg-defs: FORCE
|
||||
$(Q)$(MAKE) -C $(arm64_gen_sysreg_dir)
|
||||
|
||||
arm64-sysreg-defs-clean:
|
||||
$(call QUIET_CLEAN,arm64-sysreg-defs)
|
||||
$(Q)$(MAKE) -C $(arm64_gen_sysreg_dir) clean > /dev/null
|
||||
|
||||
$(drm_ioctl_array): $(drm_hdr_dir)/drm.h $(drm_hdr_dir)/i915_drm.h $(drm_ioctl_tbl)
|
||||
$(Q)$(SHELL) '$(drm_ioctl_tbl)' $(drm_hdr_dir) > $@
|
||||
|
||||
|
@ -367,3 +367,7 @@
|
||||
450 common set_mempolicy_home_node sys_set_mempolicy_home_node
|
||||
451 n64 cachestat sys_cachestat
|
||||
452 n64 fchmodat2 sys_fchmodat2
|
||||
453 n64 map_shadow_stack sys_map_shadow_stack
|
||||
454 n64 futex_wake sys_futex_wake
|
||||
455 n64 futex_wait sys_futex_wait
|
||||
456 n64 futex_requeue sys_futex_requeue
|
||||
|
@ -539,3 +539,7 @@
|
||||
450 nospu set_mempolicy_home_node sys_set_mempolicy_home_node
|
||||
451 common cachestat sys_cachestat
|
||||
452 common fchmodat2 sys_fchmodat2
|
||||
453 common map_shadow_stack sys_ni_syscall
|
||||
454 common futex_wake sys_futex_wake
|
||||
455 common futex_wait sys_futex_wait
|
||||
456 common futex_requeue sys_futex_requeue
|
||||
|
@ -455,3 +455,7 @@
|
||||
450 common set_mempolicy_home_node sys_set_mempolicy_home_node sys_set_mempolicy_home_node
|
||||
451 common cachestat sys_cachestat sys_cachestat
|
||||
452 common fchmodat2 sys_fchmodat2 sys_fchmodat2
|
||||
453 common map_shadow_stack sys_map_shadow_stack sys_map_shadow_stack
|
||||
454 common futex_wake sys_futex_wake sys_futex_wake
|
||||
455 common futex_wait sys_futex_wait sys_futex_wait
|
||||
456 common futex_requeue sys_futex_requeue sys_futex_requeue
|
||||
|
@ -375,6 +375,9 @@
|
||||
451 common cachestat sys_cachestat
|
||||
452 common fchmodat2 sys_fchmodat2
|
||||
453 64 map_shadow_stack sys_map_shadow_stack
|
||||
454 common futex_wake sys_futex_wake
|
||||
455 common futex_wait sys_futex_wait
|
||||
456 common futex_requeue sys_futex_requeue
|
||||
|
||||
#
|
||||
# Due to a historical design error, certain syscalls are numbered differently
|
||||
|
@ -1643,7 +1643,7 @@ static int top_print_work(struct perf_kwork *kwork __maybe_unused, struct kwork_
|
||||
/*
|
||||
* pid
|
||||
*/
|
||||
ret += printf(" %*ld ", PRINT_PID_WIDTH, work->id);
|
||||
ret += printf(" %*" PRIu64 " ", PRINT_PID_WIDTH, work->id);
|
||||
|
||||
/*
|
||||
* tgid
|
||||
|
@ -383,6 +383,7 @@ struct ucred {
|
||||
#define SOL_MPTCP 284
|
||||
#define SOL_MCTP 285
|
||||
#define SOL_SMC 286
|
||||
#define SOL_VSOCK 287
|
||||
|
||||
/* IPX options */
|
||||
#define IPX_TYPE 1
|
||||
|
@ -347,7 +347,7 @@ CFLAGS_rbtree.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ET
|
||||
CFLAGS_libstring.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))"
|
||||
CFLAGS_hweight.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))"
|
||||
CFLAGS_header.o += -include $(OUTPUT)PERF-VERSION-FILE
|
||||
CFLAGS_arm-spe.o += -I$(srctree)/tools/arch/arm64/include/ -I$(srctree)/tools/arch/arm64/include/generated/
|
||||
CFLAGS_arm-spe.o += -I$(srctree)/tools/arch/arm64/include/ -I$(OUTPUT)arch/arm64/include/generated/
|
||||
|
||||
$(OUTPUT)util/argv_split.o: ../lib/argv_split.c FORCE
|
||||
$(call rule_mkdir)
|
||||
|
@ -12,6 +12,7 @@
|
||||
#include <linux/zalloc.h>
|
||||
#include <linux/string.h>
|
||||
#include <bpf/bpf.h>
|
||||
#include <inttypes.h>
|
||||
|
||||
#include "bpf_skel/lock_contention.skel.h"
|
||||
#include "bpf_skel/lock_data.h"
|
||||
@ -250,7 +251,7 @@ static const char *lock_contention_get_name(struct lock_contention *con,
|
||||
if (cgrp)
|
||||
return cgrp->name;
|
||||
|
||||
snprintf(name_buf, sizeof(name_buf), "cgroup:%lu", cgrp_id);
|
||||
snprintf(name_buf, sizeof(name_buf), "cgroup:%" PRIu64 "", cgrp_id);
|
||||
return name_buf;
|
||||
}
|
||||
|
||||
|
@ -18,12 +18,13 @@ else
|
||||
endif
|
||||
|
||||
ifeq ($(ARCH),arm64)
|
||||
arm64_tools_dir := $(top_srcdir)/tools/arch/arm64/tools/
|
||||
tools_dir := $(top_srcdir)/tools
|
||||
arm64_tools_dir := $(tools_dir)/arch/arm64/tools/
|
||||
GEN_HDRS := $(top_srcdir)/tools/arch/arm64/include/generated/
|
||||
CFLAGS += -I$(GEN_HDRS)
|
||||
|
||||
$(GEN_HDRS): $(wildcard $(arm64_tools_dir)/*)
|
||||
$(MAKE) -C $(arm64_tools_dir)
|
||||
$(MAKE) -C $(arm64_tools_dir) O=$(tools_dir)
|
||||
endif
|
||||
|
||||
LIBKVM += lib/assert.c
|
||||
|
Loading…
Reference in New Issue
Block a user