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drm/i915/cdclk: use i9xx_fsb_freq() for rawclk_freq initialization

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Instead of duplicating the CLKCFG parsing, reuse i9xx_fsb_freq() to
figure out rawclk_freq where applicable.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/21511f155f1f446e066117bc6ed3165618d7afd6.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Jani Nikula 2024-06-14 12:22:38 +03:00
parent d0a6e5015f
commit 1cd377f33d
1 changed files with 3 additions and 43 deletions
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46
drivers/gpu/drm/i915/display/intel_cdclk.c
View File

@ -23,6 +23,7 @@
#include <linux/time.h>
#include "soc/intel_dram.h"
#include "hsw_ips.h"
#include "i915_reg.h"
#include "intel_atomic.h"
@ -3539,10 +3540,8 @@ static int vlv_hrawclk(struct drm_i915_private *dev_priv)
CCK_DISPLAY_REF_CLOCK_CONTROL);
}
static int i9xx_hrawclk(struct drm_i915_private *dev_priv)
static int i9xx_hrawclk(struct drm_i915_private *i915)
{
u32 clkcfg;
/*
* hrawclock is 1/4 the FSB frequency
*
@ -3553,46 +3552,7 @@ static int i9xx_hrawclk(struct drm_i915_private *dev_priv)
* don't know which registers have that information,
* and all the relevant docs have gone to bit heaven :(
*/
clkcfg = intel_de_read(dev_priv, CLKCFG) & CLKCFG_FSB_MASK;
if (IS_MOBILE(dev_priv)) {
switch (clkcfg) {
case CLKCFG_FSB_400:
return 100000;
case CLKCFG_FSB_533:
return 133333;
case CLKCFG_FSB_667:
return 166667;
case CLKCFG_FSB_800:
return 200000;
case CLKCFG_FSB_1067:
return 266667;
case CLKCFG_FSB_1333:
return 333333;
default:
MISSING_CASE(clkcfg);
return 133333;
}
} else {
switch (clkcfg) {
case CLKCFG_FSB_400_ALT:
return 100000;
case CLKCFG_FSB_533:
return 133333;
case CLKCFG_FSB_667:
return 166667;
case CLKCFG_FSB_800:
return 200000;
case CLKCFG_FSB_1067_ALT:
return 266667;
case CLKCFG_FSB_1333_ALT:
return 333333;
case CLKCFG_FSB_1600_ALT:
return 400000;
default:
return 133333;
}
}
return DIV_ROUND_CLOSEST(i9xx_fsb_freq(i915), 4);
}
/**