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dt-bindings: clock: renesas,cpg-clocks: Add top-level constraints

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Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:".  Add missing top-level constraints
for clocks and clock-output-names.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240818173014.122073-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Krzysztof Kozlowski 2024-08-18 19:30:12 +02:00 committed by Geert Uytterhoeven
parent 120c2833b7
commit 0dec2d0c8a
1 changed files with 6 additions and 2 deletions
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Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml
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@ -32,12 +32,16 @@ properties:
reg: reg:
maxItems: 1 maxItems: 1
clocks: true clocks:
minItems: 1
maxItems: 3
'#clock-cells': '#clock-cells':
const: 1 const: 1
clock-output-names: true clock-output-names:
minItems: 3
maxItems: 17
renesas,mode: renesas,mode:
description: Board-specific settings of the MD_CK* bits on R-Mobile A1 description: Board-specific settings of the MD_CK* bits on R-Mobile A1