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reset: starfive: Rename "jh7100" to "jh71x0" for the common code

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For the common code will be shared with the StarFive JH7110 SoC.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Emil Renner Berthing 2023-04-01 19:19:23 +08:00 committed by Conor Dooley
parent ed36fcd160
commit 0333103ee9
3 changed files with 27 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/reset/starfive/reset-starfive-jh7100.c
View File

@ -51,7 +51,7 @@ static int __init jh7100_reset_probe(struct platform_device *pdev)
if (IS_ERR(base))
return PTR_ERR(base);
return reset_starfive_jh7100_register(&pdev->dev, pdev->dev.of_node,
return reset_starfive_jh71x0_register(&pdev->dev, pdev->dev.of_node,
base + JH7100_RESET_ASSERT0,
base + JH7100_RESET_STATUS0,
jh7100_reset_asserted,

50
drivers/reset/starfive/reset-starfive-jh71x0.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Reset driver for the StarFive JH7100 SoC
* Reset driver for the StarFive JH71X0 SoCs
*
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
*/
@ -15,7 +15,7 @@
#include "reset-starfive-jh71x0.h"
struct jh7100_reset {
struct jh71x0_reset {
struct reset_controller_dev rcdev;
/* protect registers against concurrent read-modify-write */
spinlock_t lock;
@ -24,16 +24,16 @@ struct jh7100_reset {
const u64 *asserted;
};
static inline struct jh7100_reset *
jh7100_reset_from(struct reset_controller_dev *rcdev)
static inline struct jh71x0_reset *
jh71x0_reset_from(struct reset_controller_dev *rcdev)
{
return container_of(rcdev, struct jh7100_reset, rcdev);
return container_of(rcdev, struct jh71x0_reset, rcdev);
}
static int jh7100_reset_update(struct reset_controller_dev *rcdev,
static int jh71x0_reset_update(struct reset_controller_dev *rcdev,
unsigned long id, bool assert)
{
struct jh7100_reset *data = jh7100_reset_from(rcdev);
struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
unsigned long offset = BIT_ULL_WORD(id);
u64 mask = BIT_ULL_MASK(id);
void __iomem *reg_assert = data->assert + offset * sizeof(u64);
@ -62,34 +62,34 @@ static int jh7100_reset_update(struct reset_controller_dev *rcdev,
return ret;
}
static int jh7100_reset_assert(struct reset_controller_dev *rcdev,
static int jh71x0_reset_assert(struct reset_controller_dev *rcdev,
unsigned long id)
{
return jh7100_reset_update(rcdev, id, true);
return jh71x0_reset_update(rcdev, id, true);
}
static int jh7100_reset_deassert(struct reset_controller_dev *rcdev,
static int jh71x0_reset_deassert(struct reset_controller_dev *rcdev,
unsigned long id)
{
return jh7100_reset_update(rcdev, id, false);
return jh71x0_reset_update(rcdev, id, false);
}
static int jh7100_reset_reset(struct reset_controller_dev *rcdev,
static int jh71x0_reset_reset(struct reset_controller_dev *rcdev,
unsigned long id)
{
int ret;
ret = jh7100_reset_assert(rcdev, id);
ret = jh71x0_reset_assert(rcdev, id);
if (ret)
return ret;
return jh7100_reset_deassert(rcdev, id);
return jh71x0_reset_deassert(rcdev, id);
}
static int jh7100_reset_status(struct reset_controller_dev *rcdev,
static int jh71x0_reset_status(struct reset_controller_dev *rcdev,
unsigned long id)
{
struct jh7100_reset *data = jh7100_reset_from(rcdev);
struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
unsigned long offset = BIT_ULL_WORD(id);
u64 mask = BIT_ULL_MASK(id);
void __iomem *reg_status = data->status + offset * sizeof(u64);
@ -98,25 +98,25 @@ static int jh7100_reset_status(struct reset_controller_dev *rcdev,
return !((value ^ data->asserted[offset]) & mask);
}
static const struct reset_control_ops jh7100_reset_ops = {
.assert = jh7100_reset_assert,
.deassert = jh7100_reset_deassert,
.reset = jh7100_reset_reset,
.status = jh7100_reset_status,
static const struct reset_control_ops jh71x0_reset_ops = {
.assert = jh71x0_reset_assert,
.deassert = jh71x0_reset_deassert,
.reset = jh71x0_reset_reset,
.status = jh71x0_reset_status,
};
int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
void __iomem *assert, void __iomem *status,
const u64 *asserted, unsigned int nr_resets,
struct module *owner)
{
struct jh7100_reset *data;
struct jh71x0_reset *data;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->rcdev.ops = &jh7100_reset_ops;
data->rcdev.ops = &jh71x0_reset_ops;
data->rcdev.owner = owner;
data->rcdev.nr_resets = nr_resets;
data->rcdev.dev = dev;
@ -129,4 +129,4 @@ int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_no
return devm_reset_controller_register(dev, &data->rcdev);
}
EXPORT_SYMBOL_GPL(reset_starfive_jh7100_register);
EXPORT_SYMBOL_GPL(reset_starfive_jh71x0_register);

2
drivers/reset/starfive/reset-starfive-jh71x0.h
View File

@ -6,7 +6,7 @@
#ifndef __RESET_STARFIVE_JH71X0_H
#define __RESET_STARFIVE_JH71X0_H
int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
void __iomem *assert, void __iomem *status,
const u64 *asserted, unsigned int nr_resets,
struct module *owner);