bpf, docs: Editorial nits in instruction-set.rst
This patch addresses a number of editorial nits including spelling, punctuation, grammar, and wording consistency issues in instruction-set.rst. Signed-off-by: Dave Thaler <dthaler1968@gmail.com> Acked-by: David Vernet <void@manifault.com> Link: https://lore.kernel.org/r/20240405155245.3618-1-dthaler1968@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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@ -43,7 +43,7 @@ a type's signedness (`S`) and bit width (`N`), respectively.
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===== =========
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For example, `u32` is a type whose valid values are all the 32-bit unsigned
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numbers and `s16` is a types whose valid values are all the 16-bit signed
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numbers and `s16` is a type whose valid values are all the 16-bit signed
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numbers.
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Functions
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@ -108,7 +108,7 @@ conformance group means it must support all instructions in that conformance
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group.
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The use of named conformance groups enables interoperability between a runtime
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that executes instructions, and tools as such compilers that generate
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that executes instructions, and tools such as compilers that generate
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instructions for the runtime. Thus, capability discovery in terms of
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conformance groups might be done manually by users or automatically by tools.
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@ -181,10 +181,13 @@ A basic instruction is encoded as follows::
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(`64-bit immediate instructions`_ reuse this field for other purposes)
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**dst_reg**
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destination register number (0-10)
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destination register number (0-10), unless otherwise specified
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(future instructions might reuse this field for other purposes)
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**offset**
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signed integer offset used with pointer arithmetic
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signed integer offset used with pointer arithmetic, except where
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otherwise specified (some arithmetic instructions reuse this field
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for other purposes)
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**imm**
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signed integer immediate value
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@ -228,10 +231,12 @@ This is depicted in the following figure::
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operation to perform, encoded as explained above
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**regs**
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The source and destination register numbers, encoded as explained above
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The source and destination register numbers (unless otherwise
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specified), encoded as explained above
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**offset**
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signed integer offset used with pointer arithmetic
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signed integer offset used with pointer arithmetic, unless
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otherwise specified
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**imm**
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signed integer immediate value
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@ -342,8 +347,8 @@ where '(u32)' indicates that the upper 32 bits are zeroed.
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dst = dst ^ imm
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Note that most instructions have instruction offset of 0. Only three instructions
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(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero offset.
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Note that most arithmetic instructions have 'offset' set to 0. Only three instructions
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(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero 'offset'.
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Division, multiplication, and modulo operations for ``ALU`` are part
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of the "divmul32" conformance group, and division, multiplication, and
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@ -370,10 +375,10 @@ etc. This specification requires that signed modulo use truncated division
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a % n = a - n * trunc(a / n)
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The ``MOVSX`` instruction does a move operation with sign extension.
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``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 32
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bit operands, and zeroes the remaining upper 32 bits.
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``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into
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32-bit operands, and zeroes the remaining upper 32 bits.
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``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
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operands into 64 bit operands. Unlike other arithmetic instructions,
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operands into 64-bit operands. Unlike other arithmetic instructions,
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``MOVSX`` is only defined for register source operands (``X``).
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The ``NEG`` instruction is only defined when the source bit is clear
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@ -411,19 +416,19 @@ conformance group.
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Examples:
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``{END, TO_LE, ALU}`` with imm = 16/32/64 means::
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``{END, TO_LE, ALU}`` with 'imm' = 16/32/64 means::
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dst = htole16(dst)
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dst = htole32(dst)
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dst = htole64(dst)
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``{END, TO_BE, ALU}`` with imm = 16/32/64 means::
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``{END, TO_BE, ALU}`` with 'imm' = 16/32/64 means::
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dst = htobe16(dst)
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dst = htobe32(dst)
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dst = htobe64(dst)
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``{END, TO_LE, ALU64}`` with imm = 16/32/64 means::
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``{END, TO_LE, ALU64}`` with 'imm' = 16/32/64 means::
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dst = bswap16(dst)
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dst = bswap32(dst)
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@ -475,7 +480,7 @@ where 's>=' indicates a signed '>=' comparison.
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gotol +imm
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where 'imm' means the branch offset comes from insn 'imm' field.
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where 'imm' means the branch offset comes from the 'imm' field.
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Note that there are two flavors of ``JA`` instructions. The
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``JMP`` class permits a 16-bit jump offset specified by the 'offset'
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@ -494,25 +499,25 @@ Helper functions are a concept whereby BPF programs can call into a
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set of function calls exposed by the underlying platform.
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Historically, each helper function was identified by an address
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encoded in the imm field. The available helper functions may differ
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encoded in the 'imm' field. The available helper functions may differ
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for each program type, but address values are unique across all program types.
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Platforms that support the BPF Type Format (BTF) support identifying
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a helper function by a BTF ID encoded in the imm field, where the BTF ID
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a helper function by a BTF ID encoded in the 'imm' field, where the BTF ID
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identifies the helper name and type.
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Program-local functions
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~~~~~~~~~~~~~~~~~~~~~~~
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Program-local functions are functions exposed by the same BPF program as the
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caller, and are referenced by offset from the call instruction, similar to
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``JA``. The offset is encoded in the imm field of the call instruction.
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A ``EXIT`` within the program-local function will return to the caller.
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``JA``. The offset is encoded in the 'imm' field of the call instruction.
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An ``EXIT`` within the program-local function will return to the caller.
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Load and store instructions
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===========================
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For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the
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8-bit 'opcode' field is divided as::
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8-bit 'opcode' field is divided as follows::
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+-+-+-+-+-+-+-+-+
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|mode |sz |class|
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@ -580,7 +585,7 @@ instructions that transfer data between a register and memory.
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dst = *(signed size *) (src + offset)
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Where size is one of: ``B``, ``H``, or ``W``, and
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Where '<size>' is one of: ``B``, ``H``, or ``W``, and
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'signed size' is one of: s8, s16, or s32.
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Atomic operations
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