2009-06-04 02:32:12 -07:00
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#ifndef __MACH_MX25_H__
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#define __MACH_MX25_H__
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2009-11-12 13:51:55 -07:00
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#define MX25_AIPS1_BASE_ADDR 0x43f00000
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#define MX25_AIPS1_BASE_ADDR_VIRT 0xfc000000
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2009-06-04 02:32:12 -07:00
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#define MX25_AIPS1_SIZE SZ_1M
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2009-11-12 13:51:55 -07:00
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#define MX25_AIPS2_BASE_ADDR 0x53f00000
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#define MX25_AIPS2_BASE_ADDR_VIRT 0xfc200000
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2009-06-04 02:32:12 -07:00
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#define MX25_AIPS2_SIZE SZ_1M
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#define MX25_AVIC_BASE_ADDR 0x68000000
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2009-11-12 13:51:55 -07:00
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#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000
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2009-06-04 02:32:12 -07:00
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#define MX25_AVIC_SIZE SZ_1M
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#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
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#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
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#define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000)
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#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
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#define MX25_GPIO1_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
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#define MX25_GPIO2_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
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#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
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#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
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2009-12-16 11:07:04 -07:00
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#define MX25_IO_ADDRESS(x) ( \
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IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \
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IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \
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IMX_IO_ADDRESS(x, MX25_AVIC))
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2009-06-04 02:32:12 -07:00
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#define UART1_BASE_ADDR 0x43f90000
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#define UART2_BASE_ADDR 0x43f94000
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2009-12-21 04:44:31 -07:00
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#define MX25_FEC_BASE_ADDR 0x50038000
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2010-01-14 02:24:14 -07:00
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#define MX25_NFC_BASE_ADDR 0xbb000000
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2010-01-27 06:00:48 -07:00
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#define MX25_DRYICE_BASE_ADDR 0x53ffc000
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2009-12-21 04:44:31 -07:00
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2010-01-27 06:00:48 -07:00
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#define MX25_INT_DRYICE 25
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2009-12-21 04:44:31 -07:00
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#define MX25_INT_FEC 57
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2010-01-14 02:24:14 -07:00
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#define MX25_INT_NANDFC 33
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2009-12-21 04:44:31 -07:00
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2010-01-08 08:02:30 -07:00
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#endif /* ifndef __MACH_MX25_H__ */
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