2020-07-24 09:07:58 -07:00
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/module.h>
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2023-07-18 07:31:43 -07:00
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#include <linux/platform_device.h>
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2020-07-24 09:07:58 -07:00
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#include <linux/pm_clock.h>
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
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#include "clk-alpha-pll.h"
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#include "clk-branch.h"
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#include "clk-rcg.h"
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#include "clk-regmap.h"
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#include "common.h"
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#include "gdsc.h"
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enum {
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P_BI_TCXO,
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P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD,
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P_SLEEP_CLK,
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};
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2024-05-10 09:50:00 -07:00
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static const struct pll_vco fabia_vco[] = {
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2020-07-24 09:07:58 -07:00
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{ 249600000, 2000000000, 0 },
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};
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static const struct alpha_pll_config lpass_lpaaudio_dig_pll_config = {
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.l = 0x20,
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.alpha = 0x0,
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.config_ctl_val = 0x20485699,
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.config_ctl_hi_val = 0x00002067,
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.test_ctl_val = 0x40000000,
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.test_ctl_hi_val = 0x00000000,
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.user_ctl_val = 0x00005105,
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.user_ctl_hi_val = 0x00004805,
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};
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static const u8 clk_alpha_pll_regs_offset[][PLL_OFF_MAX_REGS] = {
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[CLK_ALPHA_PLL_TYPE_FABIA] = {
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[PLL_OFF_L_VAL] = 0x04,
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[PLL_OFF_CAL_L_VAL] = 0x8,
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[PLL_OFF_USER_CTL] = 0x0c,
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[PLL_OFF_USER_CTL_U] = 0x10,
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[PLL_OFF_USER_CTL_U1] = 0x14,
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[PLL_OFF_CONFIG_CTL] = 0x18,
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[PLL_OFF_CONFIG_CTL_U] = 0x1C,
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[PLL_OFF_CONFIG_CTL_U1] = 0x20,
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[PLL_OFF_TEST_CTL] = 0x24,
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[PLL_OFF_TEST_CTL_U] = 0x28,
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[PLL_OFF_STATUS] = 0x30,
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[PLL_OFF_OPMODE] = 0x38,
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[PLL_OFF_FRAC] = 0x40,
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},
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};
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static struct clk_alpha_pll lpass_lpaaudio_dig_pll = {
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.offset = 0x1000,
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.vco_table = fabia_vco,
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.num_vco = ARRAY_SIZE(fabia_vco),
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.regs = clk_alpha_pll_regs_offset[CLK_ALPHA_PLL_TYPE_FABIA],
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.clkr = {
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.hw.init = &(struct clk_init_data){
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.name = "lpass_lpaaudio_dig_pll",
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.parent_data = &(const struct clk_parent_data){
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.fw_name = "bi_tcxo",
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},
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.num_parents = 1,
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.ops = &clk_alpha_pll_fabia_ops,
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},
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},
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};
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static const struct clk_div_table
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post_div_table_lpass_lpaaudio_dig_pll_out_odd[] = {
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{ 0x5, 5 },
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{ }
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};
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static struct clk_alpha_pll_postdiv lpass_lpaaudio_dig_pll_out_odd = {
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.offset = 0x1000,
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.post_div_shift = 12,
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.post_div_table = post_div_table_lpass_lpaaudio_dig_pll_out_odd,
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.num_post_div =
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ARRAY_SIZE(post_div_table_lpass_lpaaudio_dig_pll_out_odd),
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.width = 4,
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.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA],
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.clkr.hw.init = &(struct clk_init_data){
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.name = "lpass_lpaaudio_dig_pll_out_odd",
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2023-01-03 07:55:11 -07:00
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.parent_hws = (const struct clk_hw*[]) {
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&lpass_lpaaudio_dig_pll.clkr.hw,
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2020-07-24 09:07:58 -07:00
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_alpha_pll_postdiv_fabia_ops,
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},
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};
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static const struct parent_map lpass_core_cc_parent_map_0[] = {
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{ P_BI_TCXO, 0 },
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{ P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 5 },
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};
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static const struct clk_parent_data lpass_core_cc_parent_data_0[] = {
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{ .fw_name = "bi_tcxo" },
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{ .hw = &lpass_lpaaudio_dig_pll_out_odd.clkr.hw },
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};
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static const struct parent_map lpass_core_cc_parent_map_2[] = {
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{ P_BI_TCXO, 0 },
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};
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static struct clk_rcg2 core_clk_src = {
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.cmd_rcgr = 0x1d000,
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.mnd_width = 8,
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.hid_width = 5,
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.parent_map = lpass_core_cc_parent_map_2,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "core_clk_src",
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.parent_data = &(const struct clk_parent_data){
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.fw_name = "bi_tcxo",
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},
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.num_parents = 1,
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.ops = &clk_rcg2_ops,
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},
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};
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static const struct freq_tbl ftbl_ext_mclk0_clk_src[] = {
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F(9600000, P_BI_TCXO, 2, 0, 0),
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F(19200000, P_BI_TCXO, 1, 0, 0),
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{ }
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};
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static const struct freq_tbl ftbl_ext_lpaif_clk_src[] = {
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F(256000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 15, 1, 32),
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F(512000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 15, 1, 16),
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F(768000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 10, 1, 16),
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F(1024000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 15, 1, 8),
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F(1536000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 10, 1, 8),
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F(2048000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 15, 1, 4),
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F(3072000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 10, 1, 4),
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F(4096000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 15, 1, 2),
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F(6144000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 10, 1, 2),
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F(8192000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 15, 0, 0),
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F(9600000, P_BI_TCXO, 2, 0, 0),
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F(12288000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 10, 0, 0),
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F(19200000, P_BI_TCXO, 1, 0, 0),
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F(24576000, P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD, 5, 0, 0),
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{ }
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};
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static struct clk_rcg2 ext_mclk0_clk_src = {
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.cmd_rcgr = 0x20000,
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.mnd_width = 8,
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.hid_width = 5,
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.parent_map = lpass_core_cc_parent_map_0,
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.freq_tbl = ftbl_ext_mclk0_clk_src,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "ext_mclk0_clk_src",
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.parent_data = lpass_core_cc_parent_data_0,
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.num_parents = 2,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_rcg2_ops,
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},
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};
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static struct clk_rcg2 lpaif_pri_clk_src = {
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.cmd_rcgr = 0x10000,
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.mnd_width = 16,
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.hid_width = 5,
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.parent_map = lpass_core_cc_parent_map_0,
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.freq_tbl = ftbl_ext_lpaif_clk_src,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "lpaif_pri_clk_src",
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.parent_data = lpass_core_cc_parent_data_0,
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.num_parents = 2,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_rcg2_ops,
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},
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};
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static struct clk_rcg2 lpaif_sec_clk_src = {
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.cmd_rcgr = 0x11000,
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.mnd_width = 16,
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.hid_width = 5,
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.parent_map = lpass_core_cc_parent_map_0,
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.freq_tbl = ftbl_ext_lpaif_clk_src,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "lpaif_sec_clk_src",
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.parent_data = lpass_core_cc_parent_data_0,
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.num_parents = 2,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_rcg2_ops,
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},
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};
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static struct clk_branch lpass_audio_core_ext_mclk0_clk = {
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.halt_reg = 0x20014,
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.halt_check = BRANCH_HALT,
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.hwcg_reg = 0x20014,
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.hwcg_bit = 1,
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.clkr = {
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.enable_reg = 0x20014,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "lpass_audio_core_ext_mclk0_clk",
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.parent_hws = (const struct clk_hw*[]) {
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&ext_mclk0_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch lpass_audio_core_lpaif_pri_ibit_clk = {
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.halt_reg = 0x10018,
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.halt_check = BRANCH_HALT,
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.hwcg_reg = 0x10018,
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.hwcg_bit = 1,
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.clkr = {
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.enable_reg = 0x10018,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "lpass_audio_core_lpaif_pri_ibit_clk",
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.parent_hws = (const struct clk_hw*[]) {
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&lpaif_pri_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch lpass_audio_core_lpaif_sec_ibit_clk = {
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.halt_reg = 0x11018,
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.halt_check = BRANCH_HALT,
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.hwcg_reg = 0x11018,
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.hwcg_bit = 1,
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.clkr = {
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.enable_reg = 0x11018,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "lpass_audio_core_lpaif_sec_ibit_clk",
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.parent_hws = (const struct clk_hw*[]) {
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&lpaif_sec_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch lpass_audio_core_sysnoc_mport_core_clk = {
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.halt_reg = 0x23000,
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.halt_check = BRANCH_HALT,
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.hwcg_reg = 0x23000,
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.hwcg_bit = 1,
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.clkr = {
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.enable_reg = 0x23000,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "lpass_audio_core_sysnoc_mport_core_clk",
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.parent_hws = (const struct clk_hw*[]) {
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&core_clk_src.clkr.hw,
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_regmap *lpass_core_cc_sc7180_clocks[] = {
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[EXT_MCLK0_CLK_SRC] = &ext_mclk0_clk_src.clkr,
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[LPAIF_PRI_CLK_SRC] = &lpaif_pri_clk_src.clkr,
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[LPAIF_SEC_CLK_SRC] = &lpaif_sec_clk_src.clkr,
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[CORE_CLK_SRC] = &core_clk_src.clkr,
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[LPASS_AUDIO_CORE_EXT_MCLK0_CLK] = &lpass_audio_core_ext_mclk0_clk.clkr,
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[LPASS_AUDIO_CORE_LPAIF_PRI_IBIT_CLK] =
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&lpass_audio_core_lpaif_pri_ibit_clk.clkr,
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[LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK] =
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&lpass_audio_core_lpaif_sec_ibit_clk.clkr,
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[LPASS_AUDIO_CORE_SYSNOC_MPORT_CORE_CLK] =
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&lpass_audio_core_sysnoc_mport_core_clk.clkr,
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[LPASS_LPAAUDIO_DIG_PLL] = &lpass_lpaaudio_dig_pll.clkr,
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[LPASS_LPAAUDIO_DIG_PLL_OUT_ODD] = &lpass_lpaaudio_dig_pll_out_odd.clkr,
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};
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static struct gdsc lpass_pdc_hm_gdsc = {
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.gdscr = 0x3090,
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.pd = {
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.name = "lpass_pdc_hm_gdsc",
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},
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.pwrsts = PWRSTS_OFF_ON,
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.flags = VOTABLE,
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};
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static struct gdsc lpass_audio_hm_gdsc = {
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.gdscr = 0x9090,
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.pd = {
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.name = "lpass_audio_hm_gdsc",
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},
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.pwrsts = PWRSTS_OFF_ON,
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};
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static struct gdsc lpass_core_hm_gdsc = {
|
|
|
|
.gdscr = 0x0,
|
|
|
|
.pd = {
|
|
|
|
.name = "lpass_core_hm_gdsc",
|
|
|
|
},
|
|
|
|
.pwrsts = PWRSTS_OFF_ON,
|
|
|
|
.flags = RETAIN_FF_ENABLE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct gdsc *lpass_core_hm_sc7180_gdscs[] = {
|
|
|
|
[LPASS_CORE_HM_GDSCR] = &lpass_core_hm_gdsc,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct gdsc *lpass_audio_hm_sc7180_gdscs[] = {
|
|
|
|
[LPASS_PDC_HM_GDSCR] = &lpass_pdc_hm_gdsc,
|
|
|
|
[LPASS_AUDIO_HM_GDSCR] = &lpass_audio_hm_gdsc,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct regmap_config lpass_core_cc_sc7180_regmap_config = {
|
|
|
|
.reg_bits = 32,
|
|
|
|
.reg_stride = 4,
|
|
|
|
.val_bits = 32,
|
|
|
|
.fast_io = true,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct qcom_cc_desc lpass_core_hm_sc7180_desc = {
|
|
|
|
.config = &lpass_core_cc_sc7180_regmap_config,
|
|
|
|
.gdscs = lpass_core_hm_sc7180_gdscs,
|
|
|
|
.num_gdscs = ARRAY_SIZE(lpass_core_hm_sc7180_gdscs),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct qcom_cc_desc lpass_core_cc_sc7180_desc = {
|
|
|
|
.config = &lpass_core_cc_sc7180_regmap_config,
|
|
|
|
.clks = lpass_core_cc_sc7180_clocks,
|
|
|
|
.num_clks = ARRAY_SIZE(lpass_core_cc_sc7180_clocks),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = {
|
|
|
|
.config = &lpass_core_cc_sc7180_regmap_config,
|
|
|
|
.gdscs = lpass_audio_hm_sc7180_gdscs,
|
|
|
|
.num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
|
|
|
|
};
|
|
|
|
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
static int lpass_setup_runtime_pm(struct platform_device *pdev)
|
2020-10-19 15:49:35 -07:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2020-11-20 09:40:17 -07:00
|
|
|
pm_runtime_use_autosuspend(&pdev->dev);
|
|
|
|
pm_runtime_set_autosuspend_delay(&pdev->dev, 500);
|
|
|
|
|
2021-07-31 12:50:34 -07:00
|
|
|
ret = devm_pm_runtime_enable(&pdev->dev);
|
2020-10-19 15:49:35 -07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2021-07-31 12:50:34 -07:00
|
|
|
ret = devm_pm_clk_create(&pdev->dev);
|
2020-10-19 15:49:35 -07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = pm_clk_add(&pdev->dev, "iface");
|
|
|
|
if (ret < 0)
|
|
|
|
dev_err(&pdev->dev, "failed to acquire iface clock\n");
|
|
|
|
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
return pm_runtime_resume_and_get(&pdev->dev);
|
2020-10-19 15:49:35 -07:00
|
|
|
}
|
|
|
|
|
2020-07-24 09:07:58 -07:00
|
|
|
static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
const struct qcom_cc_desc *desc;
|
|
|
|
struct regmap *regmap;
|
|
|
|
int ret;
|
|
|
|
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
ret = lpass_setup_runtime_pm(pdev);
|
2020-10-19 15:49:35 -07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2020-07-24 09:07:58 -07:00
|
|
|
lpass_core_cc_sc7180_regmap_config.name = "lpass_audio_cc";
|
|
|
|
desc = &lpass_audio_hm_sc7180_desc;
|
|
|
|
ret = qcom_cc_probe_by_index(pdev, 1, desc);
|
|
|
|
if (ret)
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
goto exit;
|
2020-07-24 09:07:58 -07:00
|
|
|
|
|
|
|
lpass_core_cc_sc7180_regmap_config.name = "lpass_core_cc";
|
|
|
|
regmap = qcom_cc_map(pdev, &lpass_core_cc_sc7180_desc);
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
if (IS_ERR(regmap)) {
|
|
|
|
ret = PTR_ERR(regmap);
|
|
|
|
goto exit;
|
|
|
|
}
|
2020-07-24 09:07:58 -07:00
|
|
|
|
2024-02-12 09:10:47 -07:00
|
|
|
/* Keep some clocks always-on */
|
|
|
|
qcom_branch_set_clk_en(regmap, 0x24000); /* LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK */
|
2020-07-24 09:07:58 -07:00
|
|
|
|
|
|
|
/* PLL settings */
|
|
|
|
regmap_write(regmap, 0x1008, 0x20);
|
|
|
|
regmap_update_bits(regmap, 0x1014, BIT(0), BIT(0));
|
|
|
|
|
|
|
|
clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap,
|
|
|
|
&lpass_lpaaudio_dig_pll_config);
|
|
|
|
|
2024-06-05 05:45:40 -07:00
|
|
|
ret = qcom_cc_really_probe(&pdev->dev, &lpass_core_cc_sc7180_desc, regmap);
|
2020-11-20 09:40:17 -07:00
|
|
|
|
|
|
|
pm_runtime_mark_last_busy(&pdev->dev);
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
exit:
|
2020-11-20 09:40:17 -07:00
|
|
|
pm_runtime_put_autosuspend(&pdev->dev);
|
|
|
|
|
|
|
|
return ret;
|
2020-07-24 09:07:58 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static int lpass_hm_core_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
const struct qcom_cc_desc *desc;
|
2020-10-19 15:49:35 -07:00
|
|
|
int ret;
|
|
|
|
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
ret = lpass_setup_runtime_pm(pdev);
|
2020-10-19 15:49:35 -07:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
2020-07-24 09:07:58 -07:00
|
|
|
|
|
|
|
lpass_core_cc_sc7180_regmap_config.name = "lpass_hm_core";
|
|
|
|
desc = &lpass_core_hm_sc7180_desc;
|
|
|
|
|
clk: qcom: lpass-sc7180: Fix pm_runtime usage
The sc7180 lpass clock controller's pm_runtime usage wasn't broken
quite as spectacularly as the sc7280's pm_runtime usage, but it was
still broken. Putting some printouts in at boot showed me this (with
serial console enabled, which makes the prints slow and thus changes
timing):
[ 3.109951] DOUG: my_pm_clk_resume, usage=1
[ 3.114767] DOUG: my_pm_clk_resume, usage=1
[ 3.664443] DOUG: my_pm_clk_suspend, usage=0
[ 3.897566] DOUG: my_pm_clk_suspend, usage=0
[ 3.910137] DOUG: my_pm_clk_resume, usage=1
[ 3.923217] DOUG: my_pm_clk_resume, usage=0
[ 4.440116] DOUG: my_pm_clk_suspend, usage=-1
[ 4.444982] DOUG: my_pm_clk_suspend, usage=0
[ 14.170501] DOUG: my_pm_clk_resume, usage=1
[ 14.176245] DOUG: my_pm_clk_resume, usage=0
...or this w/out serial console:
[ 0.556139] DOUG: my_pm_clk_resume, usage=1
[ 0.556279] DOUG: my_pm_clk_resume, usage=1
[ 1.058422] DOUG: my_pm_clk_suspend, usage=-1
[ 1.058464] DOUG: my_pm_clk_suspend, usage=0
[ 1.186250] DOUG: my_pm_clk_resume, usage=1
[ 1.186292] DOUG: my_pm_clk_resume, usage=0
[ 1.731536] DOUG: my_pm_clk_suspend, usage=-1
[ 1.731557] DOUG: my_pm_clk_suspend, usage=0
[ 10.288910] DOUG: my_pm_clk_resume, usage=1
[ 10.289496] DOUG: my_pm_clk_resume, usage=0
It seems to be doing roughly the right sequence of calls, but just
like with sc7280 this is more by luck than anything. Having a usage of
-1 is just not OK.
Let's fix this like we did with sc7280.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes: ce8c195e652f ("clk: qcom: lpasscc: Introduce pm autosuspend for SC7180")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104064055.2.I49b25b9bda9430fc7ea21e5a708ca5a0aced2798@changeid
2022-11-04 06:56:29 -07:00
|
|
|
ret = qcom_cc_probe_by_index(pdev, 0, desc);
|
|
|
|
|
|
|
|
pm_runtime_mark_last_busy(&pdev->dev);
|
|
|
|
pm_runtime_put_autosuspend(&pdev->dev);
|
|
|
|
|
|
|
|
return ret;
|
2020-07-24 09:07:58 -07:00
|
|
|
}
|
|
|
|
|
2020-10-19 15:49:35 -07:00
|
|
|
static const struct of_device_id lpass_hm_sc7180_match_table[] = {
|
2020-07-24 09:07:58 -07:00
|
|
|
{
|
|
|
|
.compatible = "qcom,sc7180-lpasshm",
|
|
|
|
},
|
2020-10-19 15:49:35 -07:00
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, lpass_hm_sc7180_match_table);
|
|
|
|
|
|
|
|
static const struct of_device_id lpass_core_cc_sc7180_match_table[] = {
|
2020-07-24 09:07:58 -07:00
|
|
|
{
|
|
|
|
.compatible = "qcom,sc7180-lpasscorecc",
|
|
|
|
},
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, lpass_core_cc_sc7180_match_table);
|
|
|
|
|
2022-11-04 06:56:30 -07:00
|
|
|
static const struct dev_pm_ops lpass_pm_ops = {
|
2020-07-24 09:07:58 -07:00
|
|
|
SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_driver lpass_core_cc_sc7180_driver = {
|
2020-10-19 15:49:35 -07:00
|
|
|
.probe = lpass_core_cc_sc7180_probe,
|
2020-07-24 09:07:58 -07:00
|
|
|
.driver = {
|
|
|
|
.name = "lpass_core_cc-sc7180",
|
|
|
|
.of_match_table = lpass_core_cc_sc7180_match_table,
|
2022-11-04 06:56:30 -07:00
|
|
|
.pm = &lpass_pm_ops,
|
2020-07-24 09:07:58 -07:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2020-10-19 15:49:35 -07:00
|
|
|
static struct platform_driver lpass_hm_sc7180_driver = {
|
|
|
|
.probe = lpass_hm_core_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = "lpass_hm-sc7180",
|
|
|
|
.of_match_table = lpass_hm_sc7180_match_table,
|
2022-11-04 06:56:30 -07:00
|
|
|
.pm = &lpass_pm_ops,
|
2020-10-19 15:49:35 -07:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init lpass_sc7180_init(void)
|
2020-07-24 09:07:58 -07:00
|
|
|
{
|
2020-10-19 15:49:35 -07:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = platform_driver_register(&lpass_core_cc_sc7180_driver);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2020-11-13 03:14:19 -07:00
|
|
|
ret = platform_driver_register(&lpass_hm_sc7180_driver);
|
|
|
|
if (ret) {
|
|
|
|
platform_driver_unregister(&lpass_core_cc_sc7180_driver);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2020-07-24 09:07:58 -07:00
|
|
|
}
|
2020-10-19 15:49:35 -07:00
|
|
|
subsys_initcall(lpass_sc7180_init);
|
2020-07-24 09:07:58 -07:00
|
|
|
|
2020-10-19 15:49:35 -07:00
|
|
|
static void __exit lpass_sc7180_exit(void)
|
2020-07-24 09:07:58 -07:00
|
|
|
{
|
2020-10-19 15:49:35 -07:00
|
|
|
platform_driver_unregister(&lpass_hm_sc7180_driver);
|
2020-07-24 09:07:58 -07:00
|
|
|
platform_driver_unregister(&lpass_core_cc_sc7180_driver);
|
|
|
|
}
|
2020-10-19 15:49:35 -07:00
|
|
|
module_exit(lpass_sc7180_exit);
|
2020-07-24 09:07:58 -07:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("QTI LPASS_CORE_CC SC7180 Driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|