2019-05-29 16:57:59 -07:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2015-09-29 17:39:16 -07:00
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/*
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* digi00x.h - a part of driver for Digidesign Digi 002/003 family
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*
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* Copyright (c) 2014-2015 Takashi Sakamoto
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*/
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#ifndef SOUND_DIGI00X_H_INCLUDED
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#define SOUND_DIGI00X_H_INCLUDED
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#include <linux/compat.h>
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#include <linux/device.h>
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#include <linux/firewire.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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2017-02-02 11:15:33 -07:00
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#include <linux/sched/signal.h>
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2015-09-29 17:39:16 -07:00
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#include <sound/core.h>
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#include <sound/initval.h>
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2015-09-29 17:39:19 -07:00
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#include <sound/info.h>
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2015-09-29 17:39:17 -07:00
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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2015-09-29 17:39:21 -07:00
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#include <sound/firewire.h>
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#include <sound/hwdep.h>
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2015-10-10 20:30:15 -07:00
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#include <sound/rawmidi.h>
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2015-09-29 17:39:16 -07:00
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#include "../lib.h"
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2015-09-29 17:39:17 -07:00
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#include "../iso-resources.h"
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#include "../amdtp-stream.h"
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2015-09-29 17:39:16 -07:00
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struct snd_dg00x {
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struct snd_card *card;
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struct fw_unit *unit;
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struct mutex mutex;
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2015-09-29 17:39:21 -07:00
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spinlock_t lock;
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2015-09-29 17:39:18 -07:00
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struct amdtp_stream tx_stream;
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struct fw_iso_resources tx_resources;
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struct amdtp_stream rx_stream;
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struct fw_iso_resources rx_resources;
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unsigned int substreams_counter;
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/* for uapi */
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int dev_lock_count;
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bool dev_lock_changed;
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wait_queue_head_t hwdep_wait;
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2015-09-29 17:39:22 -07:00
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/* For asynchronous messages. */
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struct fw_address_handler async_handler;
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u32 msg;
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2015-10-10 20:30:17 -07:00
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2017-04-02 07:48:27 -07:00
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/* Console models have additional MIDI ports for control surface. */
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ALSA: firewire-digi00x: add support for console models of Digi00x series
Digi00x series includes two types of unit; rack and console. As long as
reading information on config rom of Digi 002 console, 'MODEL_ID' field
has a different value from the one on Digi 002 rack.
We've already got a test report from users with Digi 003 rack. We can
assume that console type and rack type has different value in the field.
This commit adds a device entry for console type. For following commits,
this commit also adds a member to 'struct snd_digi00x' to identify console
type.
$ cd linux-firewire-utils/src
$ python2 ./crpp < /sys/bus/firewire/devices/fw1/config_rom
ROM header and bus information block
-----------------------------------------------------------------
400 0404f9d0 bus_info_length 4, crc_length 4, crc 63952
404 31333934 bus_name "1394"
408 60647002 irmc 0, cmc 1, isc 1, bmc 0, cyc_clk_acc 100, max_rec 7 (256)
40c 00a07e00 company_id 00a07e |
410 00a30000 device_id 0000a30000 | EUI-64 00a07e0000a30000
root directory
-----------------------------------------------------------------
414 00058a39 directory_length 5, crc 35385
418 0c0043a0 node capabilities
41c 04000001 hardware version
420 0300a07e vendor
424 81000007 --> descriptor leaf at 440
428 d1000001 --> unit directory at 42c
unit directory at 42c
-----------------------------------------------------------------
42c 00046674 directory_length 4, crc 26228
430 120000a3 specifier id
434 13000001 version
438 17000001 model
43c 81000007 --> descriptor leaf at 458
descriptor leaf at 440
-----------------------------------------------------------------
440 00055913 leaf_length 5, crc 22803
444 000050f2 descriptor_type 00, specifier_ID 50f2
448 80000000
44c 44696769
450 64657369
454 676e0000
descriptor leaf at 458
-----------------------------------------------------------------
458 0004a6fd leaf_length 4, crc 42749
45c 00000000 textual descriptor
460 00000000 minimal ASCII
464 44696769 "Digi"
468 20303032 " 002"
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-04-02 07:48:24 -07:00
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bool is_console;
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2019-08-03 23:21:34 -07:00
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struct amdtp_domain domain;
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2015-09-29 17:39:18 -07:00
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};
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#define DG00X_ADDR_BASE 0xffffe0000000ull
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#define DG00X_OFFSET_STREAMING_STATE 0x0000
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#define DG00X_OFFSET_STREAMING_SET 0x0004
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/* unknown but address in host space 0x0008 */
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/* For LSB of the address 0x000c */
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/* unknown 0x0010 */
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#define DG00X_OFFSET_MESSAGE_ADDR 0x0014
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/* For LSB of the address 0x0018 */
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/* unknown 0x001c */
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/* unknown 0x0020 */
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/* not used 0x0024--0x00ff */
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#define DG00X_OFFSET_ISOC_CHANNELS 0x0100
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/* unknown 0x0104 */
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/* unknown 0x0108 */
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/* unknown 0x010c */
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#define DG00X_OFFSET_LOCAL_RATE 0x0110
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#define DG00X_OFFSET_EXTERNAL_RATE 0x0114
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#define DG00X_OFFSET_CLOCK_SOURCE 0x0118
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#define DG00X_OFFSET_OPT_IFACE_MODE 0x011c
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/* unknown 0x0120 */
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/* Mixer control on/off 0x0124 */
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/* unknown 0x0128 */
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#define DG00X_OFFSET_DETECT_EXTERNAL 0x012c
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/* unknown 0x0138 */
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#define DG00X_OFFSET_MMC 0x0400
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enum snd_dg00x_rate {
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SND_DG00X_RATE_44100 = 0,
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SND_DG00X_RATE_48000,
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SND_DG00X_RATE_88200,
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SND_DG00X_RATE_96000,
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SND_DG00X_RATE_COUNT,
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};
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enum snd_dg00x_clock {
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SND_DG00X_CLOCK_INTERNAL = 0,
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SND_DG00X_CLOCK_SPDIF,
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SND_DG00X_CLOCK_ADAT,
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SND_DG00X_CLOCK_WORD,
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SND_DG00X_CLOCK_COUNT,
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};
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2015-09-29 17:39:19 -07:00
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enum snd_dg00x_optical_mode {
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SND_DG00X_OPT_IFACE_MODE_ADAT = 0,
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SND_DG00X_OPT_IFACE_MODE_SPDIF,
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SND_DG00X_OPT_IFACE_MODE_COUNT,
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};
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2015-10-10 20:30:15 -07:00
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#define DOT_MIDI_IN_PORTS 1
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#define DOT_MIDI_OUT_PORTS 2
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2015-09-29 17:39:17 -07:00
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int amdtp_dot_init(struct amdtp_stream *s, struct fw_unit *unit,
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enum amdtp_stream_direction dir);
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int amdtp_dot_set_parameters(struct amdtp_stream *s, unsigned int rate,
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unsigned int pcm_channels);
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void amdtp_dot_reset(struct amdtp_stream *s);
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int amdtp_dot_add_pcm_hw_constraints(struct amdtp_stream *s,
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struct snd_pcm_runtime *runtime);
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void amdtp_dot_midi_trigger(struct amdtp_stream *s, unsigned int port,
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struct snd_rawmidi_substream *midi);
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2015-09-29 17:39:17 -07:00
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2015-09-29 17:39:22 -07:00
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int snd_dg00x_transaction_register(struct snd_dg00x *dg00x);
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int snd_dg00x_transaction_reregister(struct snd_dg00x *dg00x);
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void snd_dg00x_transaction_unregister(struct snd_dg00x *dg00x);
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2015-09-29 17:39:18 -07:00
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extern const unsigned int snd_dg00x_stream_rates[SND_DG00X_RATE_COUNT];
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extern const unsigned int snd_dg00x_stream_pcm_channels[SND_DG00X_RATE_COUNT];
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int snd_dg00x_stream_get_external_rate(struct snd_dg00x *dg00x,
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unsigned int *rate);
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int snd_dg00x_stream_get_local_rate(struct snd_dg00x *dg00x,
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unsigned int *rate);
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int snd_dg00x_stream_set_local_rate(struct snd_dg00x *dg00x, unsigned int rate);
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int snd_dg00x_stream_get_clock(struct snd_dg00x *dg00x,
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enum snd_dg00x_clock *clock);
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int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x,
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bool *detect);
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int snd_dg00x_stream_init_duplex(struct snd_dg00x *dg00x);
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2019-10-07 04:05:21 -07:00
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int snd_dg00x_stream_reserve_duplex(struct snd_dg00x *dg00x, unsigned int rate,
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2019-10-17 08:54:18 -07:00
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unsigned int frames_per_period,
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unsigned int frames_per_buffer);
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2019-06-11 06:21:11 -07:00
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int snd_dg00x_stream_start_duplex(struct snd_dg00x *dg00x);
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2015-09-29 17:39:18 -07:00
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void snd_dg00x_stream_stop_duplex(struct snd_dg00x *dg00x);
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void snd_dg00x_stream_update_duplex(struct snd_dg00x *dg00x);
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void snd_dg00x_stream_destroy_duplex(struct snd_dg00x *dg00x);
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2015-09-29 17:39:21 -07:00
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void snd_dg00x_stream_lock_changed(struct snd_dg00x *dg00x);
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int snd_dg00x_stream_lock_try(struct snd_dg00x *dg00x);
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void snd_dg00x_stream_lock_release(struct snd_dg00x *dg00x);
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2015-09-29 17:39:19 -07:00
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void snd_dg00x_proc_init(struct snd_dg00x *dg00x);
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2015-09-29 17:39:20 -07:00
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int snd_dg00x_create_pcm_devices(struct snd_dg00x *dg00x);
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2015-10-10 20:30:16 -07:00
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int snd_dg00x_create_midi_devices(struct snd_dg00x *dg00x);
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2015-09-29 17:39:21 -07:00
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int snd_dg00x_create_hwdep_device(struct snd_dg00x *dg00x);
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2015-09-29 17:39:16 -07:00
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#endif
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