2021-03-30 04:12:36 -07:00
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
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*/
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2022-11-03 01:25:29 -07:00
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#include <linux/bcm47xx_nvram.h>
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2023-06-11 07:03:08 -07:00
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#include <linux/etherdevice.h>
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#include <linux/if_ether.h>
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2021-03-30 04:12:36 -07:00
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#include <linux/io.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define NVRAM_MAGIC "FLSH"
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2023-12-15 04:13:58 -07:00
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/**
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* struct brcm_nvram - driver state internal struct
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*
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* @dev: NVMEM device pointer
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* @nvmem_size: Size of the whole space available for NVRAM
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* @data: NVRAM data copy stored to avoid poking underlaying flash controller
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* @data_len: NVRAM data size
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* @padding_byte: Padding value used to fill remaining space
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* @cells: Array of discovered NVMEM cells
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* @ncells: Number of elements in cells
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*/
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struct brcm_nvram {
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struct device *dev;
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size_t nvmem_size;
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uint8_t *data;
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size_t data_len;
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uint8_t padding_byte;
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struct nvmem_cell_info *cells;
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int ncells;
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};
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struct brcm_nvram_header {
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char magic[4];
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__le32 len;
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__le32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
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__le32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */
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__le32 config_ncdl; /* ncdl values for memc */
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};
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static int brcm_nvram_read(void *context, unsigned int offset, void *val,
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size_t bytes)
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{
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struct brcm_nvram *priv = context;
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size_t to_copy;
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if (offset + bytes > priv->data_len)
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to_copy = max_t(ssize_t, (ssize_t)priv->data_len - offset, 0);
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else
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to_copy = bytes;
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memcpy(val, priv->data + offset, to_copy);
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memset((uint8_t *)val + to_copy, priv->padding_byte, bytes - to_copy);
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return 0;
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}
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static int brcm_nvram_copy_data(struct brcm_nvram *priv, struct platform_device *pdev)
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{
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struct resource *res;
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void __iomem *base;
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base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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priv->nvmem_size = resource_size(res);
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priv->padding_byte = readb(base + priv->nvmem_size - 1);
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for (priv->data_len = priv->nvmem_size;
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priv->data_len;
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priv->data_len--) {
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if (readb(base + priv->data_len - 1) != priv->padding_byte)
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break;
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}
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WARN(priv->data_len > SZ_128K, "Unexpected (big) NVRAM size: %zu B\n", priv->data_len);
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priv->data = devm_kzalloc(priv->dev, priv->data_len, GFP_KERNEL);
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if (!priv->data)
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return -ENOMEM;
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memcpy_fromio(priv->data, base, priv->data_len);
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bcm47xx_nvram_init_from_iomem(base, priv->data_len);
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return 0;
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}
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2023-06-11 07:03:08 -07:00
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static int brcm_nvram_read_post_process_macaddr(void *context, const char *id, int index,
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unsigned int offset, void *buf, size_t bytes)
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{
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u8 mac[ETH_ALEN];
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if (bytes != 3 * ETH_ALEN - 1)
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return -EINVAL;
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if (!mac_pton(buf, mac))
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return -EINVAL;
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if (index)
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eth_addr_add(mac, index);
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ether_addr_copy(buf, mac);
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return 0;
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}
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static int brcm_nvram_add_cells(struct brcm_nvram *priv, uint8_t *data,
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size_t len)
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{
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struct device *dev = priv->dev;
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char *var, *value;
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uint8_t tmp;
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int idx;
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int err = 0;
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tmp = priv->data[len - 1];
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priv->data[len - 1] = '\0';
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priv->ncells = 0;
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for (var = data + sizeof(struct brcm_nvram_header);
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var < (char *)data + len && *var;
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var += strlen(var) + 1) {
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priv->ncells++;
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}
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priv->cells = devm_kcalloc(dev, priv->ncells, sizeof(*priv->cells), GFP_KERNEL);
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if (!priv->cells) {
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err = -ENOMEM;
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goto out;
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}
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for (var = data + sizeof(struct brcm_nvram_header), idx = 0;
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var < (char *)data + len && *var;
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var = value + strlen(value) + 1, idx++) {
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char *eq, *name;
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eq = strchr(var, '=');
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if (!eq)
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break;
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*eq = '\0';
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name = devm_kstrdup(dev, var, GFP_KERNEL);
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*eq = '=';
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if (!name) {
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err = -ENOMEM;
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goto out;
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}
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value = eq + 1;
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priv->cells[idx].name = name;
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priv->cells[idx].offset = value - (char *)data;
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priv->cells[idx].bytes = strlen(value);
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priv->cells[idx].np = of_get_child_by_name(dev->of_node, priv->cells[idx].name);
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if (!strcmp(name, "et0macaddr") ||
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!strcmp(name, "et1macaddr") ||
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!strcmp(name, "et2macaddr")) {
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priv->cells[idx].raw_len = strlen(value);
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priv->cells[idx].bytes = ETH_ALEN;
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priv->cells[idx].read_post_process = brcm_nvram_read_post_process_macaddr;
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}
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}
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out:
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priv->data[len - 1] = tmp;
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return err;
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}
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static int brcm_nvram_parse(struct brcm_nvram *priv)
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{
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struct brcm_nvram_header *header = (struct brcm_nvram_header *)priv->data;
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struct device *dev = priv->dev;
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size_t len;
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int err;
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if (memcmp(header->magic, NVRAM_MAGIC, 4)) {
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dev_err(dev, "Invalid NVRAM magic\n");
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return -EINVAL;
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}
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len = le32_to_cpu(header->len);
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if (len > priv->nvmem_size) {
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dev_err(dev, "NVRAM length (%zd) exceeds mapped size (%zd)\n", len,
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priv->nvmem_size);
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return -EINVAL;
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}
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2023-12-15 04:13:58 -07:00
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err = brcm_nvram_add_cells(priv, priv->data, len);
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if (err)
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dev_err(dev, "Failed to add cells: %d\n", err);
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return 0;
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}
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static int brcm_nvram_probe(struct platform_device *pdev)
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{
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struct nvmem_config config = {
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.name = "brcm-nvram",
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.reg_read = brcm_nvram_read,
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};
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struct device *dev = &pdev->dev;
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struct brcm_nvram *priv;
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int err;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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2023-12-15 04:13:58 -07:00
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err = brcm_nvram_copy_data(priv, pdev);
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if (err)
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return err;
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err = brcm_nvram_parse(priv);
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if (err)
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return err;
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config.dev = dev;
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config.cells = priv->cells;
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config.ncells = priv->ncells;
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config.priv = priv;
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config.size = priv->nvmem_size;
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return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config));
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}
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static const struct of_device_id brcm_nvram_of_match_table[] = {
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{ .compatible = "brcm,nvram", },
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{},
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};
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static struct platform_driver brcm_nvram_driver = {
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.probe = brcm_nvram_probe,
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.driver = {
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.name = "brcm_nvram",
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.of_match_table = brcm_nvram_of_match_table,
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},
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};
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static int __init brcm_nvram_init(void)
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{
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return platform_driver_register(&brcm_nvram_driver);
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}
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subsys_initcall_sync(brcm_nvram_init);
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MODULE_AUTHOR("Rafał Miłecki");
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2024-07-05 00:48:38 -07:00
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MODULE_DESCRIPTION("Broadcom I/O-mapped NVRAM support driver");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(of, brcm_nvram_of_match_table);
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