2019-11-15 06:57:20 -07:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AD7091RX Analog to Digital converter driver
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*
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* Copyright 2014-2019 Analog Devices Inc.
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*/
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#ifndef __DRIVERS_IIO_ADC_AD7091R_BASE_H__
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#define __DRIVERS_IIO_ADC_AD7091R_BASE_H__
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2023-12-19 13:27:36 -07:00
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#include <linux/regmap.h>
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2023-12-19 13:27:04 -07:00
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#define AD7091R_REG_RESULT 0
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#define AD7091R_REG_CHANNEL 1
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#define AD7091R_REG_CONF 2
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#define AD7091R_REG_ALERT 3
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#define AD7091R_REG_CH_LOW_LIMIT(ch) ((ch) * 3 + 4)
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#define AD7091R_REG_CH_HIGH_LIMIT(ch) ((ch) * 3 + 5)
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#define AD7091R_REG_CH_HYSTERESIS(ch) ((ch) * 3 + 6)
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2023-12-19 13:29:30 -07:00
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/* AD7091R_REG_RESULT */
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#define AD7091R5_REG_RESULT_CH_ID(x) (((x) >> 13) & 0x3)
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#define AD7091R8_REG_RESULT_CH_ID(x) (((x) >> 13) & 0x7)
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#define AD7091R_REG_RESULT_CONV_RESULT(x) ((x) & 0xfff)
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2023-12-19 13:28:45 -07:00
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/* AD7091R_REG_CONF */
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#define AD7091R_REG_CONF_INT_VREF BIT(0)
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#define AD7091R_REG_CONF_ALERT_EN BIT(4)
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#define AD7091R_REG_CONF_AUTO BIT(8)
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#define AD7091R_REG_CONF_CMD BIT(10)
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#define AD7091R_REG_CONF_MODE_MASK \
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(AD7091R_REG_CONF_AUTO | AD7091R_REG_CONF_CMD)
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2023-12-19 13:26:01 -07:00
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/* AD7091R_REG_CH_LIMIT */
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#define AD7091R_HIGH_LIMIT 0xFFF
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#define AD7091R_LOW_LIMIT 0x0
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#define AD7091R_CHANNEL(idx, bits, ev, num_ev) { \
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.type = IIO_VOLTAGE, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.indexed = 1, \
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.channel = idx, \
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.event_spec = ev, \
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.num_event_specs = num_ev, \
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.scan_type.storagebits = 16, \
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.scan_type.realbits = bits, \
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}
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2019-11-15 06:57:20 -07:00
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struct device;
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struct gpio_desc;
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enum ad7091r_mode {
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AD7091R_MODE_SAMPLE,
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AD7091R_MODE_COMMAND,
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AD7091R_MODE_AUTOCYCLE,
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};
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struct ad7091r_state {
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struct device *dev;
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struct regmap *map;
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struct gpio_desc *convst_gpio;
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struct gpio_desc *reset_gpio;
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struct regulator *vref;
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const struct ad7091r_chip_info *chip_info;
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enum ad7091r_mode mode;
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struct mutex lock; /*lock to prevent concurent reads */
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__be16 tx_buf __aligned(IIO_DMA_MINALIGN);
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__be16 rx_buf;
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};
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struct ad7091r_chip_info {
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const char *name;
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unsigned int num_channels;
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const struct iio_chan_spec *channels;
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2019-11-15 06:57:21 -07:00
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unsigned int vref_mV;
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unsigned int (*reg_result_chan_id)(unsigned int val);
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int (*set_mode)(struct ad7091r_state *st, enum ad7091r_mode mode);
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};
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struct ad7091r_init_info {
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const struct ad7091r_chip_info *info_irq;
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const struct ad7091r_chip_info *info_no_irq;
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const struct regmap_config *regmap_config;
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void (*init_adc_regmap)(struct ad7091r_state *st,
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const struct regmap_config *regmap_conf);
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int (*setup)(struct ad7091r_state *st);
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};
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extern const struct iio_event_spec ad7091r_events[3];
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2019-11-15 06:57:20 -07:00
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2023-12-19 13:28:05 -07:00
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int ad7091r_probe(struct device *dev, const struct ad7091r_init_info *init_info,
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int irq);
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2019-11-15 06:57:20 -07:00
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bool ad7091r_volatile_reg(struct device *dev, unsigned int reg);
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bool ad7091r_writeable_reg(struct device *dev, unsigned int reg);
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2019-11-15 06:57:20 -07:00
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#endif /* __DRIVERS_IIO_ADC_AD7091R_BASE_H__ */
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