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linux/arch/nios2/include/asm/tlbflush.h

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details [based] [from] [clk] [highbank] [c] you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 355 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-19 06:51:43 -07:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
nios2: TLB handling This patch adds the TLB maintenance functions. Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-11-06 00:19:50 -07:00
/*
* Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
*/
#ifndef _ASM_NIOS2_TLBFLUSH_H
#define _ASM_NIOS2_TLBFLUSH_H
struct mm_struct;
/*
* TLB flushing:
*
* - flush_tlb_all() flushes all processes TLB entries
* - flush_tlb_mm(mm) flushes the specified mm context TLB entries
* - flush_tlb_range(vma, start, end) flushes a range of pages
nios2: flush_tlb_page use PID based flush flush_tlb_page is for flushing user pages, so it should not be using flush_tlb_one (which flushes all pages). This patch implements it with the flush_tlb_range, which is a user flush that does the right thing. flush_tlb_one is made static to mm/tlb.c because it's a bit confusing. It is used in do_page_fault to flush the kernel non-linear mappings, so that is replaced with flush_tlb_kernel_page. The end result is that functionality is identical. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-11-04 19:00:15 -07:00
* - flush_tlb_page(vma, address) flushes a page
nios2: TLB handling This patch adds the TLB maintenance functions. Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-11-06 00:19:50 -07:00
* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
nios2: flush_tlb_page use PID based flush flush_tlb_page is for flushing user pages, so it should not be using flush_tlb_one (which flushes all pages). This patch implements it with the flush_tlb_range, which is a user flush that does the right thing. flush_tlb_one is made static to mm/tlb.c because it's a bit confusing. It is used in do_page_fault to flush the kernel non-linear mappings, so that is replaced with flush_tlb_kernel_page. The end result is that functionality is identical. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-11-04 19:00:15 -07:00
* - flush_tlb_kernel_page(address) flushes a kernel page
nios2: update_mmu_cache preload the TLB with the new PTE Rather than flush the TLB entry when installing a new PTE to allow the fast TLB reload to re-fill the TLB, just refill the TLB entry when removing the old one. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-11-06 19:35:34 -07:00
*
* - reload_tlb_page(vma, address, pte) flushes the TLB for address like
* flush_tlb_page, then replaces it with a TLB for pte.
nios2: TLB handling This patch adds the TLB maintenance functions. Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-11-06 00:19:50 -07:00
*/
extern void flush_tlb_all(void);
extern void flush_tlb_mm(struct mm_struct *mm);
extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end);
extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
static inline void flush_tlb_page(struct vm_area_struct *vma,
nios2: flush_tlb_page use PID based flush flush_tlb_page is for flushing user pages, so it should not be using flush_tlb_one (which flushes all pages). This patch implements it with the flush_tlb_range, which is a user flush that does the right thing. flush_tlb_one is made static to mm/tlb.c because it's a bit confusing. It is used in do_page_fault to flush the kernel non-linear mappings, so that is replaced with flush_tlb_kernel_page. The end result is that functionality is identical. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-11-04 19:00:15 -07:00
unsigned long address)
nios2: TLB handling This patch adds the TLB maintenance functions. Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-11-06 00:19:50 -07:00
{
nios2: flush_tlb_page use PID based flush flush_tlb_page is for flushing user pages, so it should not be using flush_tlb_one (which flushes all pages). This patch implements it with the flush_tlb_range, which is a user flush that does the right thing. flush_tlb_one is made static to mm/tlb.c because it's a bit confusing. It is used in do_page_fault to flush the kernel non-linear mappings, so that is replaced with flush_tlb_kernel_page. The end result is that functionality is identical. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-11-04 19:00:15 -07:00
flush_tlb_range(vma, address, address + PAGE_SIZE);
}
static inline void flush_tlb_kernel_page(unsigned long address)
{
flush_tlb_kernel_range(address, address + PAGE_SIZE);
nios2: TLB handling This patch adds the TLB maintenance functions. Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-11-06 00:19:50 -07:00
}
nios2: update_mmu_cache preload the TLB with the new PTE Rather than flush the TLB entry when installing a new PTE to allow the fast TLB reload to re-fill the TLB, just refill the TLB entry when removing the old one. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-11-06 19:35:34 -07:00
extern void reload_tlb_page(struct vm_area_struct *vma, unsigned long addr,
pte_t pte);
nios2: TLB handling This patch adds the TLB maintenance functions. Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-11-06 00:19:50 -07:00
#endif /* _ASM_NIOS2_TLBFLUSH_H */
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