2019-06-04 01:11:33 -07:00
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// SPDX-License-Identifier: GPL-2.0-only
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2010-07-26 15:34:31 -07:00
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/*
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* pm.c - Common OMAP2+ power management-related code
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/err.h>
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2013-09-19 14:03:52 -07:00
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#include <linux/pm_opp.h>
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2011-07-31 13:17:29 -07:00
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#include <linux/export.h>
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2012-02-02 02:30:50 -07:00
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#include <linux/suspend.h>
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2018-04-16 10:22:01 -07:00
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#include <linux/clk.h>
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ARM: OMAP2+: PM: MPU DVFS: use generic CPU device for MPU-SS
Currently, a dummy omap_device is created for the MPU sub-system so
that a device node exists for MPU DVFS. Specifically, for the
association of MPU OPPs to a device node, and so that a voltage
regulator can be mapped to a device node.
For drivers to get a handle to this device node, an OMAP-specific API
has been used. However, the kernel already has device nodes for the
CPU(s) in the system, so we can use those instead of an OMAP-specific
dummy device and then drivers (like OMAP CPUfreq) can use generic
APIs.
To use the existing CPU device nodes, modify the OPP creation and
regulator registration to use the CPU0 device node for registraion.
NOTE: this patch always uses CPU0 as the device node. On all
OMAPs today, MPU DVFS scales all CPUs together, so this will
not be a problem, but this assumption will need to be changed
if independently scalable CPUs are introduced.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-09-06 14:03:08 -07:00
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#include <linux/cpu.h>
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2010-07-26 15:34:31 -07:00
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2012-03-29 09:30:28 -07:00
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#include <asm/system_misc.h>
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2012-10-02 17:25:48 -07:00
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#include "omap_device.h"
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2011-11-10 14:45:17 -07:00
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#include "common.h"
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2010-07-26 15:34:31 -07:00
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2012-10-05 13:25:59 -07:00
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#include "soc.h"
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2012-02-02 02:30:50 -07:00
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#include "prcm-common.h"
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2011-02-25 15:54:33 -07:00
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#include "voltage.h"
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2010-12-21 21:05:16 -07:00
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#include "powerdomain.h"
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2010-12-21 21:05:15 -07:00
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#include "clockdomain.h"
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2010-05-29 09:32:23 -07:00
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#include "pm.h"
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2010-09-14 12:34:01 -07:00
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2020-09-11 09:12:09 -07:00
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u32 enable_off_mode;
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2014-05-12 11:33:21 -07:00
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#ifdef CONFIG_SUSPEND
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2012-02-02 02:30:50 -07:00
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/*
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* omap_pm_suspend: points to a function that does the SoC-specific
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* suspend work
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*/
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2014-05-12 11:33:21 -07:00
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static int (*omap_pm_suspend)(void);
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#endif
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2012-02-02 02:30:50 -07:00
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2012-11-14 18:13:04 -07:00
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#ifdef CONFIG_PM
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2012-09-25 09:33:39 -07:00
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/**
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* struct omap2_oscillator - Describe the board main oscillator latencies
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* @startup_time: oscillator startup latency
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* @shutdown_time: oscillator shutdown latency
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*/
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struct omap2_oscillator {
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u32 startup_time;
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u32 shutdown_time;
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};
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static struct omap2_oscillator oscillator = {
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.startup_time = ULONG_MAX,
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.shutdown_time = ULONG_MAX,
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};
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void omap_pm_get_oscillator(u32 *tstart, u32 *tshut)
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{
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if (!tstart || !tshut)
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return;
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*tstart = oscillator.startup_time;
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*tshut = oscillator.shutdown_time;
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}
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2012-11-14 18:13:04 -07:00
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#endif
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2012-09-25 09:33:39 -07:00
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2017-03-28 18:57:56 -07:00
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int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
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2012-02-02 02:38:50 -07:00
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{
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2016-06-30 06:15:02 -07:00
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clkdm_allow_idle(clkdm);
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2012-02-02 02:38:50 -07:00
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return 0;
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}
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2012-02-02 02:30:50 -07:00
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#ifdef CONFIG_SUSPEND
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static int omap_pm_enter(suspend_state_t suspend_state)
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{
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int ret = 0;
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if (!omap_pm_suspend)
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return -ENOENT; /* XXX doublecheck */
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switch (suspend_state) {
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case PM_SUSPEND_MEM:
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ret = omap_pm_suspend();
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static int omap_pm_begin(suspend_state_t state)
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{
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2013-03-21 14:49:38 -07:00
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cpu_idle_poll_ctrl(true);
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2016-10-17 00:08:40 -07:00
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if (soc_is_omap34xx())
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2012-02-02 02:30:50 -07:00
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omap_prcm_irq_prepare();
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return 0;
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}
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static void omap_pm_end(void)
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{
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2013-03-21 14:49:38 -07:00
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cpu_idle_poll_ctrl(false);
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2012-02-02 02:30:50 -07:00
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}
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2018-02-09 09:15:53 -07:00
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static void omap_pm_wake(void)
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2012-02-02 02:30:50 -07:00
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{
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2016-10-17 00:08:40 -07:00
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if (soc_is_omap34xx())
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2012-02-02 02:30:50 -07:00
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omap_prcm_irq_complete();
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}
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static const struct platform_suspend_ops omap_pm_ops = {
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.begin = omap_pm_begin,
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.end = omap_pm_end,
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.enter = omap_pm_enter,
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2018-02-09 09:15:53 -07:00
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.wake = omap_pm_wake,
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2012-02-02 02:30:50 -07:00
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.valid = suspend_valid_only_mem,
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};
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2014-05-12 11:33:21 -07:00
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/**
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* omap_common_suspend_init - Set common suspend routines for OMAP SoCs
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* @pm_suspend: function pointer to SoC specific suspend function
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*/
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void omap_common_suspend_init(void *pm_suspend)
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{
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omap_pm_suspend = pm_suspend;
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suspend_set_ops(&omap_pm_ops);
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}
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2012-02-02 02:30:50 -07:00
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#endif /* CONFIG_SUSPEND */
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2018-04-16 10:23:46 -07:00
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int __maybe_unused omap_pm_nop_init(void)
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{
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return 0;
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}
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int (*omap_pm_soc_init)(void);
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2022-09-28 08:09:42 -07:00
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static int __init omap2_common_pm_late_init(void)
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2010-05-29 09:32:21 -07:00
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{
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2018-04-16 10:23:46 -07:00
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int error;
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if (!omap_pm_soc_init)
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return 0;
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2014-05-05 17:27:37 -07:00
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/* Init the voltage layer */
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2016-10-17 00:08:40 -07:00
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omap3_twl_init();
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omap4_twl_init();
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2019-10-16 07:37:06 -07:00
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omap4_cpcap_init();
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2014-05-05 17:27:37 -07:00
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omap_voltage_late_init();
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2010-05-29 09:32:25 -07:00
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2014-05-05 17:27:37 -07:00
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/* Smartreflex device init */
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omap_devinit_smartreflex();
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2010-05-29 09:32:21 -07:00
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2018-04-16 10:23:46 -07:00
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error = omap_pm_soc_init();
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if (error)
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pr_warn("%s: pm soc init failed: %i\n", __func__, error);
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omap2_clk_enable_autoidle_all();
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2010-05-29 09:32:21 -07:00
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return 0;
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}
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2018-04-16 10:23:46 -07:00
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omap_late_initcall(omap2_common_pm_late_init);
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