2024-07-11 12:15:43 -07:00
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.. SPDX-License-Identifier: GPL-2.0-only
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=============
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AD4695 driver
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=============
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ADC driver for Analog Devices Inc. AD4695 and similar devices. The module name
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is ``ad4695``.
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Supported devices
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=================
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The following chips are supported by this driver:
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* `AD4695 <https://www.analog.com/AD4695>`_
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* `AD4696 <https://www.analog.com/AD4696>`_
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* `AD4697 <https://www.analog.com/AD4697>`_
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* `AD4698 <https://www.analog.com/AD4698>`_
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Supported features
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==================
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SPI wiring modes
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----------------
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The driver currently supports the following SPI wiring configuration:
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4-wire mode
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^^^^^^^^^^^
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In this mode, CNV and CS are tied together and there is a single SDO line.
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.. code-block::
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+-------------+ +-------------+
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| CS |<-+------| CS |
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| CNV |<-+ | |
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| ADC | | HOST |
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| | | |
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| SDI |<--------| SDO |
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| SDO |-------->| SDI |
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| SCLK |<--------| SCLK |
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+-------------+ +-------------+
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To use this mode, in the device tree, omit the ``cnv-gpios`` and
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``spi-rx-bus-width`` properties.
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Channel configuration
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---------------------
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Since the chip supports multiple ways to configure each channel, this must be
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described in the device tree based on what is actually wired up to the inputs.
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There are three typical configurations:
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An ``INx`` pin is used as the positive input with the ``REFGND``, ``COM`` or
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the next ``INx`` pin as the negative input.
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Pairing with REFGND
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^^^^^^^^^^^^^^^^^^^
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Each ``INx`` pin can be used as a pseudo-differential input in conjunction with
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the ``REFGND`` pin. The device tree will look like this:
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.. code-block::
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channel@0 {
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reg = <0>; /* IN0 */
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};
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If no other channel properties are needed (e.g. ``adi,no-high-z``), the channel
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node can be omitted entirely.
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This will appear on the IIO bus as the ``voltage0`` channel. The processed value
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(*raw × scale*) will be the voltage present on the ``IN0`` pin relative to
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``REFGND``. (Offset is always 0 when pairing with ``REFGND``.)
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Pairing with COM
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^^^^^^^^^^^^^^^^
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Each ``INx`` pin can be used as a pseudo-differential input in conjunction with
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the ``COM`` pin. The device tree will look like this:
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.. code-block::
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com-supply = <&vref_div_2>;
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channel@1 {
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reg = <1>; /* IN1 */
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common-mode-channel = <AD4695_COMMON_MODE_COM>;
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bipolar;
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};
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This will appear on the IIO bus as the ``voltage1`` channel. The processed value
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(*(raw + offset) × scale*) will be the voltage measured on the ``IN1`` pin
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relative to ``REFGND``. (The offset is determined by the ``com-supply`` voltage.)
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The macro comes from:
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.. code-block::
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#include <dt-bindings/iio/adi,ad4695.h>
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Pairing two INx pins
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^^^^^^^^^^^^^^^^^^^^
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An even-numbered ``INx`` pin and the following odd-numbered ``INx`` pin can be
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used as a pseudo-differential input. The device tree for using ``IN2`` as the
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positive input and ``IN3`` as the negative input will look like this:
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.. code-block::
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in3-supply = <&vref_div_2>;
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channel@2 {
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reg = <2>; /* IN2 */
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common-mode-channel = <3>; /* IN3 */
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bipolar;
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};
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This will appear on the IIO bus as the ``voltage2`` channel. The processed value
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(*(raw + offset) × scale*) will be the voltage measured on the ``IN1`` pin
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relative to ``REFGND``. (Offset is determined by the ``in3-supply`` voltage.)
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VCC supply
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----------
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The chip supports being powered by an external LDO via the ``VCC`` input or an
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internal LDO via the ``LDO_IN`` input. The driver looks at the device tree to
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determine which is being used. If ``ldo-supply`` is present, then the internal
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LDO is used. If ``vcc-supply`` is present, then the external LDO is used and
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the internal LDO is disabled.
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Reference voltage
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-----------------
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The chip supports an external reference voltage via the ``REF`` input or an
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internal buffered reference voltage via the ``REFIN`` input. The driver looks
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at the device tree to determine which is being used. If ``ref-supply`` is
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present, then the external reference voltage is used and the internal buffer is
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disabled. If ``refin-supply`` is present, then the internal buffered reference
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voltage is used.
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2024-08-20 08:58:37 -07:00
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Gain/offset calibration
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-----------------------
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System calibration is supported using the channel gain and offset registers via
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the ``calibscale`` and ``calibbias`` attributes respectively.
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2024-07-11 12:15:43 -07:00
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Unimplemented features
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----------------------
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- Additional wiring modes
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- Threshold events
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- Oversampling
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- GPIO support
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- CRC support
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2024-08-13 10:26:41 -07:00
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Device buffers
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==============
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This driver supports hardware triggered buffers. This uses the "advanced
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sequencer" feature of the chip to trigger a burst of conversions.
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Also see :doc:`iio_devbuf` for more general information.
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