dt-bindings: PCI: qcom,pcie-sm8550: Move SM8550 to dedicated schema
The qcom,pcie.yaml binding file containing all possible Qualcomm SoC
PCIe root complexes gets quite complicated with numerous if:then:
conditions customizing clocks, interrupts, regs and resets. Adding and
reviewing new devices is difficult, so simplify it by having shared
common binding and file with only one group of compatible devices:
1. Copy all common qcom,pcie.yaml properties (so everything except
supplies) to a new shared qcom,pcie-common.yaml schema.
2. Move SM8550 PCIe compatible devices to dedicated binding file.
This creates equivalent SM8550 schema file, except:
- Missing required compatible which is actually redundant.
- Expecting eight MSI interrupts, instead of only one, which was
incomplete hardware description.
Link: https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-1-f23cda4d74c0@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2024-01-26 01:56:42 -07:00
|
|
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
|
|
|
%YAML 1.2
|
|
|
|
|
---
|
|
|
|
|
$id: http://devicetree.org/schemas/pci/qcom,pcie-common.yaml#
|
|
|
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
|
|
|
|
|
|
title: Qualcomm PCI Express Root Complex Common Properties
|
|
|
|
|
|
|
|
|
|
maintainers:
|
|
|
|
|
- Bjorn Andersson <andersson@kernel.org>
|
|
|
|
|
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
|
|
|
|
|
|
|
|
properties:
|
|
|
|
|
reg:
|
|
|
|
|
minItems: 4
|
|
|
|
|
maxItems: 6
|
|
|
|
|
|
|
|
|
|
reg-names:
|
|
|
|
|
minItems: 4
|
|
|
|
|
maxItems: 6
|
|
|
|
|
|
|
|
|
|
interrupts:
|
|
|
|
|
minItems: 1
|
2024-08-28 08:46:20 -07:00
|
|
|
maxItems: 9
|
dt-bindings: PCI: qcom,pcie-sm8550: Move SM8550 to dedicated schema
The qcom,pcie.yaml binding file containing all possible Qualcomm SoC
PCIe root complexes gets quite complicated with numerous if:then:
conditions customizing clocks, interrupts, regs and resets. Adding and
reviewing new devices is difficult, so simplify it by having shared
common binding and file with only one group of compatible devices:
1. Copy all common qcom,pcie.yaml properties (so everything except
supplies) to a new shared qcom,pcie-common.yaml schema.
2. Move SM8550 PCIe compatible devices to dedicated binding file.
This creates equivalent SM8550 schema file, except:
- Missing required compatible which is actually redundant.
- Expecting eight MSI interrupts, instead of only one, which was
incomplete hardware description.
Link: https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-1-f23cda4d74c0@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2024-01-26 01:56:42 -07:00
|
|
|
|
|
|
|
|
interrupt-names:
|
|
|
|
|
minItems: 1
|
2024-08-28 08:46:20 -07:00
|
|
|
maxItems: 9
|
dt-bindings: PCI: qcom,pcie-sm8550: Move SM8550 to dedicated schema
The qcom,pcie.yaml binding file containing all possible Qualcomm SoC
PCIe root complexes gets quite complicated with numerous if:then:
conditions customizing clocks, interrupts, regs and resets. Adding and
reviewing new devices is difficult, so simplify it by having shared
common binding and file with only one group of compatible devices:
1. Copy all common qcom,pcie.yaml properties (so everything except
supplies) to a new shared qcom,pcie-common.yaml schema.
2. Move SM8550 PCIe compatible devices to dedicated binding file.
This creates equivalent SM8550 schema file, except:
- Missing required compatible which is actually redundant.
- Expecting eight MSI interrupts, instead of only one, which was
incomplete hardware description.
Link: https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-1-f23cda4d74c0@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2024-01-26 01:56:42 -07:00
|
|
|
|
|
|
|
|
iommu-map:
|
|
|
|
|
minItems: 1
|
|
|
|
|
maxItems: 16
|
|
|
|
|
|
|
|
|
|
clocks:
|
|
|
|
|
minItems: 3
|
|
|
|
|
maxItems: 13
|
|
|
|
|
|
|
|
|
|
clock-names:
|
|
|
|
|
minItems: 3
|
|
|
|
|
maxItems: 13
|
|
|
|
|
|
|
|
|
|
dma-coherent: true
|
|
|
|
|
|
|
|
|
|
interconnects:
|
|
|
|
|
maxItems: 2
|
|
|
|
|
|
|
|
|
|
interconnect-names:
|
|
|
|
|
items:
|
|
|
|
|
- const: pcie-mem
|
|
|
|
|
- const: cpu-pcie
|
|
|
|
|
|
|
|
|
|
phys:
|
|
|
|
|
maxItems: 1
|
|
|
|
|
|
|
|
|
|
phy-names:
|
|
|
|
|
items:
|
|
|
|
|
- const: pciephy
|
|
|
|
|
|
|
|
|
|
power-domains:
|
|
|
|
|
maxItems: 1
|
|
|
|
|
|
2024-03-06 02:56:47 -07:00
|
|
|
required-opps:
|
|
|
|
|
maxItems: 1
|
|
|
|
|
|
dt-bindings: PCI: qcom,pcie-sm8550: Move SM8550 to dedicated schema
The qcom,pcie.yaml binding file containing all possible Qualcomm SoC
PCIe root complexes gets quite complicated with numerous if:then:
conditions customizing clocks, interrupts, regs and resets. Adding and
reviewing new devices is difficult, so simplify it by having shared
common binding and file with only one group of compatible devices:
1. Copy all common qcom,pcie.yaml properties (so everything except
supplies) to a new shared qcom,pcie-common.yaml schema.
2. Move SM8550 PCIe compatible devices to dedicated binding file.
This creates equivalent SM8550 schema file, except:
- Missing required compatible which is actually redundant.
- Expecting eight MSI interrupts, instead of only one, which was
incomplete hardware description.
Link: https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-1-f23cda4d74c0@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2024-01-26 01:56:42 -07:00
|
|
|
resets:
|
|
|
|
|
minItems: 1
|
|
|
|
|
maxItems: 12
|
|
|
|
|
|
|
|
|
|
reset-names:
|
|
|
|
|
minItems: 1
|
|
|
|
|
maxItems: 12
|
|
|
|
|
|
|
|
|
|
perst-gpios:
|
|
|
|
|
description: GPIO controlled connection to PERST# signal
|
|
|
|
|
maxItems: 1
|
|
|
|
|
|
|
|
|
|
wake-gpios:
|
|
|
|
|
description: GPIO controlled connection to WAKE# signal
|
|
|
|
|
maxItems: 1
|
|
|
|
|
|
2024-07-23 08:13:28 -07:00
|
|
|
vddpe-3v3-supply:
|
|
|
|
|
description: PCIe endpoint power supply
|
|
|
|
|
|
dt-bindings: PCI: qcom,pcie-sm8550: Move SM8550 to dedicated schema
The qcom,pcie.yaml binding file containing all possible Qualcomm SoC
PCIe root complexes gets quite complicated with numerous if:then:
conditions customizing clocks, interrupts, regs and resets. Adding and
reviewing new devices is difficult, so simplify it by having shared
common binding and file with only one group of compatible devices:
1. Copy all common qcom,pcie.yaml properties (so everything except
supplies) to a new shared qcom,pcie-common.yaml schema.
2. Move SM8550 PCIe compatible devices to dedicated binding file.
This creates equivalent SM8550 schema file, except:
- Missing required compatible which is actually redundant.
- Expecting eight MSI interrupts, instead of only one, which was
incomplete hardware description.
Link: https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-1-f23cda4d74c0@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2024-01-26 01:56:42 -07:00
|
|
|
required:
|
|
|
|
|
- reg
|
|
|
|
|
- reg-names
|
|
|
|
|
- interrupt-map-mask
|
|
|
|
|
- interrupt-map
|
|
|
|
|
- clocks
|
|
|
|
|
- clock-names
|
|
|
|
|
|
|
|
|
|
anyOf:
|
|
|
|
|
- required:
|
|
|
|
|
- interrupts
|
|
|
|
|
- interrupt-names
|
|
|
|
|
- "#interrupt-cells"
|
|
|
|
|
- required:
|
|
|
|
|
- msi-map
|
|
|
|
|
|
|
|
|
|
allOf:
|
2024-04-13 08:16:16 -07:00
|
|
|
- $ref: /schemas/pci/pci-host-bridge.yaml#
|
dt-bindings: PCI: qcom,pcie-sm8550: Move SM8550 to dedicated schema
The qcom,pcie.yaml binding file containing all possible Qualcomm SoC
PCIe root complexes gets quite complicated with numerous if:then:
conditions customizing clocks, interrupts, regs and resets. Adding and
reviewing new devices is difficult, so simplify it by having shared
common binding and file with only one group of compatible devices:
1. Copy all common qcom,pcie.yaml properties (so everything except
supplies) to a new shared qcom,pcie-common.yaml schema.
2. Move SM8550 PCIe compatible devices to dedicated binding file.
This creates equivalent SM8550 schema file, except:
- Missing required compatible which is actually redundant.
- Expecting eight MSI interrupts, instead of only one, which was
incomplete hardware description.
Link: https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-1-f23cda4d74c0@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2024-01-26 01:56:42 -07:00
|
|
|
|
|
|
|
|
additionalProperties: true
|