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linux/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml

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dt-bindings: clock: Add SM8350 VIDEOCC SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8350-videocc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SM8350 Video Clock & Reset Controller
maintainers:
dt-bindings: Batch-update Konrad Dybcio's email Use my @kernel.org address everywhere. Signed-off-by: Konrad Dybcio <konradybcio@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240726-topic-konrad_email-v1-3-f94665da2919@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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- Konrad Dybcio <konradybcio@kernel.org>
dt-bindings: clock: Add SM8350 VIDEOCC SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
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description: |
Qualcomm video clock control module provides the clocks, resets and power
domains on Qualcomm SoCs.
See also::
include/dt-bindings/clock/qcom,videocc-sm8350.h
include/dt-bindings/reset/qcom,videocc-sm8350.h
properties:
compatible:
dt-bindings: clock: qcom,sm8350-videocc: Add SC8280XP SC8280XP reuses the SM8350 video clock controller block, changing just a couple tunables. Docuemnt it. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230703-topic-8280_videocc-v2-1-c88269806269@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-31 12:21:32 -07:00
enum:
- qcom,sc8280xp-videocc
- qcom,sm8350-videocc
dt-bindings: clock: Add SM8350 VIDEOCC SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
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clocks:
items:
- description: Board XO source
- description: Board active XO source
- description: Board sleep clock
power-domains:
description:
A phandle and PM domain specifier for the MMCX power domain.
maxItems: 1
required-opps:
description:
A phandle to an OPP node describing required MMCX performance point.
maxItems: 1
required:
- compatible
- clocks
- power-domains
- required-opps
allOf:
- $ref: qcom,gcc.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
dt-bindings: qcom: Update RPMHPD entries for some SoCs Update the RPMHPD references with new bindings defined in rpmhpd.h for Qualcomm SoCs SM8[2345]50. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/1690461813-22564-1-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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#include <dt-bindings/power/qcom,rpmhpd.h>
dt-bindings: clock: Add SM8350 VIDEOCC SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
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clock-controller@abf0000 {
compatible = "qcom,sm8350-videocc";
reg = <0x0abf0000 0x10000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>;
dt-bindings: qcom: Update RPMHPD entries for some SoCs Update the RPMHPD references with new bindings defined in rpmhpd.h for Qualcomm SoCs SM8[2345]50. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/1690461813-22564-1-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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power-domains = <&rpmhpd RPMHPD_MMCX>;
dt-bindings: clock: Add SM8350 VIDEOCC SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
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required-opps = <&rpmhpd_opp_low_svs>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
...
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