2023-01-12 13:44:45 -07:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,qdu1000-gcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
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maintainers:
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2023-08-03 03:57:34 -07:00
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- Taniya Das <quic_tdas@quicinc.com>
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- Imran Shaik <quic_imrashai@quicinc.com>
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2023-01-12 13:44:45 -07:00
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description: |
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Qualcomm global clock control module which supports the clocks, resets and
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power domains on QDU1000 and QRU1000
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See also:: include/dt-bindings/clock/qcom,qdu1000-gcc.h
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properties:
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compatible:
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const: qcom,qdu1000-gcc
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clocks:
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items:
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- description: Board XO source
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- description: Sleep clock source
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- description: PCIE 0 Pipe clock source
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- description: PCIE 0 Phy Auxiliary clock source
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- description: USB3 Phy wrapper pipe clock source
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required:
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- compatible
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- clocks
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2024-05-29 07:47:00 -07:00
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- '#power-domain-cells'
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2023-01-12 13:44:45 -07:00
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@100000 {
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compatible = "qcom,qdu1000-gcc";
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reg = <0x00100000 0x001f4200>;
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
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<&pcie_0_pipe_clk>, <&pcie_0_phy_aux_clk>,
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<&usb3_phy_wrapper_pipe_clk>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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