2023-03-06 23:22:26 -07:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller on IPQ5332
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains on IPQ5332.
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See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h
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allOf:
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- $ref: qcom,gcc.yaml#
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properties:
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compatible:
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const: qcom,ipq5332-gcc
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clocks:
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items:
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- description: Board XO clock source
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- description: Sleep clock source
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- description: PCIE 2lane PHY pipe clock source
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- description: PCIE 2lane x1 PHY pipe clock source (For second lane)
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- description: USB PCIE wrapper pipe clock source
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2024-05-29 07:47:00 -07:00
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'#power-domain-cells': false
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2024-07-29 22:48:13 -07:00
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'#interconnect-cells':
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const: 1
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2024-05-29 07:47:00 -07:00
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2023-03-06 23:22:26 -07:00
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required:
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- compatible
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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clock-controller@1800000 {
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compatible = "qcom,ipq5332-gcc";
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reg = <0x01800000 0x80000>;
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clocks = <&xo_board>,
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<&sleep_clk>,
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<&pcie_2lane_phy_pipe_clk>,
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<&pcie_2lane_phy_pipe_clk_x1>,
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<&usb_pcie_wrapper_pipe_clk>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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...
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