2006-10-16 08:40:06 -07:00
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/*
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* Marvell PATA driver.
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*
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* For the moment we drive the PATA port in legacy mode. That
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* isn't making full use of the device functionality but it is
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* easy to get working.
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*
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* (c) 2006 Red Hat <alan@redhat.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/ata.h>
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#define DRV_NAME "pata_marvell"
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2007-03-07 09:48:09 -07:00
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#define DRV_VERSION "0.1.4"
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2006-10-16 08:40:06 -07:00
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/**
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* marvell_pre_reset - check for 40/80 pin
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2007-08-06 02:36:23 -07:00
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* @link: link
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libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 00:50:52 -07:00
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* @deadline: deadline jiffies for the operation
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2006-10-16 08:40:06 -07:00
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*
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* Perform the PATA port setup we need.
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*/
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2007-08-06 02:36:23 -07:00
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static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
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2006-10-16 08:40:06 -07:00
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{
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2007-08-06 02:36:23 -07:00
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struct ata_port *ap = link->ap;
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2006-10-16 08:40:06 -07:00
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 devices;
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void __iomem *barp;
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int i;
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/* Check if our port is enabled */
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2006-10-21 12:54:13 -07:00
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barp = pci_iomap(pdev, 5, 0x10);
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2006-10-16 08:40:06 -07:00
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if (barp == NULL)
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return -ENOMEM;
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printk("BAR5:");
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for(i = 0; i <= 0x0F; i++)
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2007-10-02 13:53:01 -07:00
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printk("%02X:%02X ", i, ioread8(barp + i));
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2006-10-16 08:40:06 -07:00
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printk("\n");
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2006-12-11 09:14:06 -07:00
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2007-10-02 13:53:01 -07:00
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devices = ioread32(barp + 0x0C);
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2006-10-21 12:54:13 -07:00
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pci_iounmap(pdev, barp);
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2006-12-11 09:14:06 -07:00
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2006-10-21 12:54:13 -07:00
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if ((pdev->device == 0x6145) && (ap->port_no == 0) &&
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(!(devices & 0x10))) /* PATA enable ? */
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2006-10-16 08:40:06 -07:00
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return -ENOENT;
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2007-03-09 07:41:19 -07:00
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2007-08-06 02:36:23 -07:00
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return ata_std_prereset(link, deadline);
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2007-03-07 09:48:09 -07:00
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}
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2006-10-16 08:40:06 -07:00
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2007-03-07 09:48:09 -07:00
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static int marvell_cable_detect(struct ata_port *ap)
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{
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2006-10-16 08:40:06 -07:00
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/* Cable type */
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switch(ap->port_no)
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{
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2006-10-21 12:54:13 -07:00
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case 0:
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2007-01-31 23:06:36 -07:00
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if (ioread8(ap->ioaddr.bmdma_addr + 1) & 1)
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2007-03-07 09:48:09 -07:00
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return ATA_CBL_PATA40;
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return ATA_CBL_PATA80;
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2006-10-21 12:54:13 -07:00
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case 1: /* Legacy SATA port */
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2007-03-07 09:48:09 -07:00
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return ATA_CBL_SATA;
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2006-10-16 08:40:06 -07:00
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}
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libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 00:50:52 -07:00
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2007-03-07 09:48:09 -07:00
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BUG();
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return 0; /* Our BUG macro needs the right markup */
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2006-10-16 08:40:06 -07:00
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}
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/**
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* marvell_error_handler - Setup and error handler
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* @ap: Port to handle
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void marvell_error_handler(struct ata_port *ap)
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{
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2006-10-21 12:54:13 -07:00
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return ata_bmdma_drive_eh(ap, marvell_pre_reset, ata_std_softreset,
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NULL, ata_std_postreset);
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2006-10-16 08:40:06 -07:00
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}
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/* No PIO or DMA methods needed for this device */
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static struct scsi_host_template marvell_sht = {
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.module = THIS_MODULE,
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.name = DRV_NAME,
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.ioctl = ata_scsi_ioctl,
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.queuecommand = ata_scsi_queuecmd,
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.can_queue = ATA_DEF_QUEUE,
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.this_id = ATA_SHT_THIS_ID,
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.sg_tablesize = LIBATA_MAX_PRD,
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.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
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.emulated = ATA_SHT_EMULATED,
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.use_clustering = ATA_SHT_USE_CLUSTERING,
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.proc_name = DRV_NAME,
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.dma_boundary = ATA_DMA_BOUNDARY,
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.slave_configure = ata_scsi_slave_config,
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2006-11-28 20:10:46 -07:00
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.slave_destroy = ata_scsi_slave_destroy,
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2006-10-16 08:40:06 -07:00
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/* Use standard CHS mapping rules */
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.bios_param = ata_std_bios_param,
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};
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static const struct ata_port_operations marvell_ops = {
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/* Task file is PCI ATA format, use helpers */
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = marvell_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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2007-03-07 09:48:09 -07:00
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.cable_detect = marvell_cable_detect,
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2006-10-16 08:40:06 -07:00
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/* BMDMA handling is PCI ATA format, use helpers */
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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2007-01-31 23:06:36 -07:00
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.data_xfer = ata_data_xfer,
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2006-10-16 08:40:06 -07:00
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/* Timeout handling */
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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2007-01-26 00:27:58 -07:00
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.irq_on = ata_irq_on,
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2006-10-16 08:40:06 -07:00
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/* Generic PATA PCI ATA helpers */
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2007-08-22 14:55:41 -07:00
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.port_start = ata_sff_port_start,
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2006-10-16 08:40:06 -07:00
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};
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/**
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* marvell_init_one - Register Marvell ATA PCI device with kernel services
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* @pdev: PCI device to register
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* @ent: Entry in marvell_pci_tbl matching with @pdev
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*
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* Called from kernel PCI layer.
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*
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* LOCKING:
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* Inherited from PCI layer (may sleep).
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*
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* RETURNS:
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* Zero on success, or -ERRNO value.
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*/
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static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
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{
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2007-05-04 03:43:58 -07:00
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static const struct ata_port_info info = {
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2006-10-16 08:40:06 -07:00
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.sht = &marvell_sht,
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2007-05-28 03:59:48 -07:00
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.flags = ATA_FLAG_SLAVE_POSS,
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2006-10-16 08:40:06 -07:00
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.pio_mask = 0x1f,
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.mwdma_mask = 0x07,
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2007-07-09 09:16:50 -07:00
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.udma_mask = ATA_UDMA5,
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2006-10-16 08:40:06 -07:00
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.port_ops = &marvell_ops,
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};
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2007-05-04 03:43:58 -07:00
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static const struct ata_port_info info_sata = {
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2006-10-16 08:40:06 -07:00
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.sht = &marvell_sht,
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/* Slave possible as its magically mapped not real */
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2007-05-28 03:59:48 -07:00
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.flags = ATA_FLAG_SLAVE_POSS,
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2006-10-16 08:40:06 -07:00
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.pio_mask = 0x1f,
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.mwdma_mask = 0x07,
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2007-07-09 09:16:50 -07:00
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.udma_mask = ATA_UDMA6,
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2006-10-16 08:40:06 -07:00
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.port_ops = &marvell_ops,
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};
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2007-05-04 03:43:58 -07:00
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const struct ata_port_info *ppi[] = { &info, &info_sata };
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2006-10-21 12:54:13 -07:00
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2006-10-16 08:40:06 -07:00
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if (pdev->device == 0x6101)
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2007-05-04 03:43:58 -07:00
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ppi[1] = &ata_dummy_port_info;
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2006-10-21 12:54:13 -07:00
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2007-05-04 03:43:58 -07:00
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return ata_pci_init_one(pdev, ppi);
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2006-10-16 08:40:06 -07:00
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}
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static const struct pci_device_id marvell_pci_tbl[] = {
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{ PCI_DEVICE(0x11AB, 0x6101), },
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2007-08-23 12:19:55 -07:00
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{ PCI_DEVICE(0x11AB, 0x6121), },
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{ PCI_DEVICE(0x11AB, 0x6123), },
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2006-10-16 08:40:06 -07:00
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{ PCI_DEVICE(0x11AB, 0x6145), },
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{ } /* terminate list */
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};
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static struct pci_driver marvell_pci_driver = {
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.name = DRV_NAME,
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.id_table = marvell_pci_tbl,
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.probe = marvell_init_one,
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.remove = ata_pci_remove_one,
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2007-03-02 01:31:26 -07:00
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#ifdef CONFIG_PM
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2006-11-22 09:57:36 -07:00
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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2007-03-02 01:31:26 -07:00
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#endif
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2006-10-16 08:40:06 -07:00
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};
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static int __init marvell_init(void)
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{
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return pci_register_driver(&marvell_pci_driver);
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}
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static void __exit marvell_exit(void)
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{
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pci_unregister_driver(&marvell_pci_driver);
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}
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module_init(marvell_init);
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module_exit(marvell_exit);
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("SCSI low-level driver for Marvell ATA in legacy mode");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, marvell_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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