2006-10-21 12:33:03 -07:00
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/*
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* Copyright (C) 2003 - 2006 NetXen, Inc.
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* All rights reserved.
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2006-12-04 10:18:00 -07:00
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*
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2006-10-21 12:33:03 -07:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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2006-12-04 10:18:00 -07:00
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*
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2006-10-21 12:33:03 -07:00
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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2006-12-04 10:18:00 -07:00
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*
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2006-10-21 12:33:03 -07:00
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston,
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* MA 02111-1307, USA.
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2006-12-04 10:18:00 -07:00
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*
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2006-10-21 12:33:03 -07:00
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.
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2006-12-04 10:18:00 -07:00
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*
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2006-10-21 12:33:03 -07:00
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* Contact Information:
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* info@netxen.com
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* NetXen,
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* 3965 Freedom Circle, Fourth floor,
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* Santa Clara, CA 95054
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*
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*
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* Source file for NIC routines to initialize the Phantom Hardware
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*
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*/
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#include <linux/netdevice.h>
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#include <linux/delay.h>
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#include "netxen_nic.h"
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#include "netxen_nic_hw.h"
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#include "netxen_nic_ioctl.h"
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#include "netxen_nic_phan_reg.h"
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struct crb_addr_pair {
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long addr;
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long data;
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};
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#define NETXEN_MAX_CRB_XFORM 60
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static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
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#define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff )
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#define crb_addr_transform(name) \
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crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
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NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
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2006-11-29 10:00:10 -07:00
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#define NETXEN_NIC_XDMA_RESET 0x8000ff
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2006-10-21 12:33:03 -07:00
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static inline void
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netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
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unsigned long off, int *data)
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{
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2006-11-29 10:00:10 -07:00
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void __iomem *addr = pci_base_offset(adapter, off);
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2006-10-21 12:33:03 -07:00
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writel(*data, addr);
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}
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static void crb_addr_transform_setup(void)
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{
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crb_addr_transform(XDMA);
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crb_addr_transform(TIMR);
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crb_addr_transform(SRE);
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crb_addr_transform(SQN3);
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crb_addr_transform(SQN2);
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crb_addr_transform(SQN1);
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crb_addr_transform(SQN0);
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crb_addr_transform(SQS3);
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crb_addr_transform(SQS2);
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crb_addr_transform(SQS1);
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crb_addr_transform(SQS0);
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crb_addr_transform(RPMX7);
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crb_addr_transform(RPMX6);
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crb_addr_transform(RPMX5);
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crb_addr_transform(RPMX4);
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crb_addr_transform(RPMX3);
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crb_addr_transform(RPMX2);
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crb_addr_transform(RPMX1);
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crb_addr_transform(RPMX0);
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crb_addr_transform(ROMUSB);
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crb_addr_transform(SN);
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crb_addr_transform(QMN);
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crb_addr_transform(QMS);
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crb_addr_transform(PGNI);
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crb_addr_transform(PGND);
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crb_addr_transform(PGN3);
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crb_addr_transform(PGN2);
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crb_addr_transform(PGN1);
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crb_addr_transform(PGN0);
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crb_addr_transform(PGSI);
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crb_addr_transform(PGSD);
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crb_addr_transform(PGS3);
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crb_addr_transform(PGS2);
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crb_addr_transform(PGS1);
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crb_addr_transform(PGS0);
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crb_addr_transform(PS);
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crb_addr_transform(PH);
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crb_addr_transform(NIU);
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crb_addr_transform(I2Q);
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crb_addr_transform(EG);
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crb_addr_transform(MN);
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crb_addr_transform(MS);
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crb_addr_transform(CAS2);
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crb_addr_transform(CAS1);
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crb_addr_transform(CAS0);
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crb_addr_transform(CAM);
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crb_addr_transform(C2C1);
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crb_addr_transform(C2C0);
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}
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int netxen_init_firmware(struct netxen_adapter *adapter)
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{
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u32 state = 0, loops = 0, err = 0;
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/* Window 1 call */
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state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
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if (state == PHAN_INITIALIZE_ACK)
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return 0;
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while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
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udelay(100);
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/* Window 1 call */
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state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
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loops++;
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}
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if (loops >= 2000) {
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printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
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state);
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err = -EIO;
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return err;
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}
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/* Window 1 call */
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2006-12-04 10:23:25 -07:00
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writel(MPORT_SINGLE_FUNCTION_MODE,
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NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
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2006-10-21 12:33:03 -07:00
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writel(PHAN_INITIALIZE_ACK,
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NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
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return err;
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}
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2006-11-29 10:00:10 -07:00
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#define NETXEN_ADDR_LIMIT 0xffffffffULL
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void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
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struct pci_dev **used_dev)
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{
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void *addr;
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addr = pci_alloc_consistent(pdev, sz, ptr);
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if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
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*used_dev = pdev;
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return addr;
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}
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pci_free_consistent(pdev, sz, addr, *ptr);
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addr = pci_alloc_consistent(NULL, sz, ptr);
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*used_dev = NULL;
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return addr;
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}
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2006-10-21 12:33:03 -07:00
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void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
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{
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int ctxid, ring;
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u32 i;
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u32 num_rx_bufs = 0;
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struct netxen_rcv_desc_ctx *rcv_desc;
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DPRINTK(INFO, "initializing some queues: %p\n", adapter);
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for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
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for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
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struct netxen_rx_buffer *rx_buf;
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rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
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rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
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rcv_desc->begin_alloc = 0;
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rx_buf = rcv_desc->rx_buf_arr;
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num_rx_bufs = rcv_desc->max_rx_desc_count;
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/*
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* Now go through all of them, set reference handles
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* and put them in the queues.
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*/
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for (i = 0; i < num_rx_bufs; i++) {
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rx_buf->ref_handle = i;
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rx_buf->state = NETXEN_BUFFER_FREE;
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DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
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"%p\n", ctxid, i, rx_buf);
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rx_buf++;
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}
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}
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}
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}
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void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
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{
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2006-11-29 10:00:10 -07:00
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int ports = 0;
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struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
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2006-10-21 12:33:03 -07:00
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if (netxen_nic_get_board_info(adapter) != 0)
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printk("%s: Error getting board config info.\n",
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netxen_nic_driver_name);
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2006-11-29 10:00:10 -07:00
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get_brd_port_by_type(board_info->board_type, &ports);
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if (ports == 0)
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2006-10-21 12:33:03 -07:00
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printk(KERN_ERR "%s: Unknown board type\n",
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netxen_nic_driver_name);
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2006-11-29 10:00:10 -07:00
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adapter->ahw.max_ports = ports;
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2006-10-21 12:33:03 -07:00
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}
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void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
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{
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switch (adapter->ahw.board_type) {
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case NETXEN_NIC_GBE:
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2006-12-04 10:18:00 -07:00
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adapter->enable_phy_interrupts =
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2006-10-21 12:33:03 -07:00
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netxen_niu_gbe_enable_phy_interrupts;
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2006-12-04 10:18:00 -07:00
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adapter->disable_phy_interrupts =
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2006-10-21 12:33:03 -07:00
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netxen_niu_gbe_disable_phy_interrupts;
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2006-12-04 10:18:00 -07:00
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adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
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adapter->macaddr_set = netxen_niu_macaddr_set;
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adapter->set_mtu = netxen_nic_set_mtu_gb;
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adapter->set_promisc = netxen_niu_set_promiscuous_mode;
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adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
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adapter->phy_read = netxen_niu_gbe_phy_read;
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adapter->phy_write = netxen_niu_gbe_phy_write;
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adapter->init_port = netxen_niu_gbe_init_port;
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adapter->init_niu = netxen_nic_init_niu_gb;
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adapter->stop_port = netxen_niu_disable_gbe_port;
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2006-10-21 12:33:03 -07:00
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break;
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case NETXEN_NIC_XGBE:
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2006-12-04 10:18:00 -07:00
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adapter->enable_phy_interrupts =
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2006-10-21 12:33:03 -07:00
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netxen_niu_xgbe_enable_phy_interrupts;
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2006-12-04 10:18:00 -07:00
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adapter->disable_phy_interrupts =
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2006-10-21 12:33:03 -07:00
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netxen_niu_xgbe_disable_phy_interrupts;
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2006-12-04 10:18:00 -07:00
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adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
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adapter->macaddr_set = netxen_niu_xg_macaddr_set;
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adapter->set_mtu = netxen_nic_set_mtu_xgb;
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adapter->init_port = netxen_niu_xg_init_port;
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adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
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adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
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adapter->stop_port = netxen_niu_disable_xg_port;
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2006-10-21 12:33:03 -07:00
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break;
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default:
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break;
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}
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}
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/*
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* netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
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* address to external PCI CRB address.
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*/
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unsigned long netxen_decode_crb_addr(unsigned long addr)
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{
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int i;
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unsigned long base_addr, offset, pci_base;
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crb_addr_transform_setup();
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pci_base = NETXEN_ADDR_ERROR;
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base_addr = addr & 0xfff00000;
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offset = addr & 0x000fffff;
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for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
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if (crb_addr_xform[i] == base_addr) {
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pci_base = i << 20;
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break;
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}
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}
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if (pci_base == NETXEN_ADDR_ERROR)
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return pci_base;
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else
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return (pci_base + offset);
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}
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static long rom_max_timeout = 10000;
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static long rom_lock_timeout = 1000000;
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static inline int rom_lock(struct netxen_adapter *adapter)
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{
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int iter;
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u32 done = 0;
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int timeout = 0;
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while (!done) {
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/* acquire semaphore2 from PCI HW block */
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netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
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&done);
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if (done == 1)
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break;
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if (timeout >= rom_lock_timeout)
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return -EIO;
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timeout++;
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/*
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* Yield CPU
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*/
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if (!in_atomic())
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schedule();
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else {
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for (iter = 0; iter < 20; iter++)
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cpu_relax(); /*This a nop instr on i386 */
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}
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}
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netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
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return 0;
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}
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int netxen_wait_rom_done(struct netxen_adapter *adapter)
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{
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long timeout = 0;
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long done = 0;
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while (done == 0) {
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done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
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done &= 2;
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timeout++;
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if (timeout >= rom_max_timeout) {
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printk("Timeout reached waiting for rom done");
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return -EIO;
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}
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}
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return 0;
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}
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2006-11-29 10:00:10 -07:00
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static inline int netxen_rom_wren(struct netxen_adapter *adapter)
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{
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/* Set write enable latch in ROM status register */
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|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
|
|
|
|
M25P_INSTR_WREN);
|
|
|
|
if (netxen_wait_rom_done(adapter)) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
|
|
|
|
unsigned int addr)
|
|
|
|
{
|
|
|
|
unsigned int data = 0xdeaddead;
|
|
|
|
data = netxen_nic_reg_read(adapter, addr);
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
|
|
|
|
M25P_INSTR_RDSR);
|
|
|
|
if (netxen_wait_rom_done(adapter)) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
/* release semaphore2 */
|
|
|
|
netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
int netxen_rom_wip_poll(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
long timeout = 0;
|
|
|
|
long wip = 1;
|
|
|
|
int val;
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
|
|
|
|
while (wip != 0) {
|
|
|
|
val = netxen_do_rom_rdsr(adapter);
|
|
|
|
wip = val & 1;
|
|
|
|
timeout++;
|
|
|
|
if (timeout > rom_max_timeout) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-12-04 10:18:00 -07:00
|
|
|
static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
|
|
|
|
int data)
|
2006-11-29 10:00:10 -07:00
|
|
|
{
|
|
|
|
if (netxen_rom_wren(adapter)) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
|
|
|
|
M25P_INSTR_PP);
|
|
|
|
if (netxen_wait_rom_done(adapter)) {
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return netxen_rom_wip_poll(adapter);
|
|
|
|
}
|
|
|
|
|
2006-10-21 12:33:03 -07:00
|
|
|
static inline int
|
|
|
|
do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
|
|
|
|
{
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
|
|
|
|
udelay(100); /* prevent bursting on CRB */
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
|
|
|
|
if (netxen_wait_rom_done(adapter)) {
|
|
|
|
printk("Error waiting for rom done\n");
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
/* reset abyte_cnt and dummy_byte_cnt */
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
|
|
|
|
udelay(100); /* prevent bursting on CRB */
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
|
|
|
|
|
|
|
|
*valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (rom_lock(adapter) != 0)
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
ret = do_rom_fast_read(adapter, addr, valp);
|
2006-11-29 10:00:10 -07:00
|
|
|
netxen_rom_unlock(adapter);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (rom_lock(adapter) != 0) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
ret = do_rom_fast_write(adapter, addr, data);
|
|
|
|
netxen_rom_unlock(adapter);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
|
|
|
|
{
|
|
|
|
netxen_rom_wren(adapter);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
|
|
|
|
M25P_INSTR_SE);
|
|
|
|
if (netxen_wait_rom_done(adapter)) {
|
|
|
|
netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return netxen_rom_wip_poll(adapter);
|
|
|
|
}
|
|
|
|
|
|
|
|
int netxen_rom_se(struct netxen_adapter *adapter, int addr)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
if (rom_lock(adapter) != 0) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
ret = netxen_do_rom_se(adapter, addr);
|
|
|
|
netxen_rom_unlock(adapter);
|
2006-10-21 12:33:03 -07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define NETXEN_BOARDTYPE 0x4008
|
|
|
|
#define NETXEN_BOARDNUM 0x400c
|
|
|
|
#define NETXEN_CHIPNUM 0x4010
|
|
|
|
#define NETXEN_ROMBUS_RESET 0xFFFFFFFF
|
|
|
|
#define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
|
|
|
|
#define NETXEN_ROM_FOUND_INIT 0x400
|
|
|
|
|
|
|
|
int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
|
|
|
|
{
|
|
|
|
int addr, val, status;
|
|
|
|
int n, i;
|
|
|
|
int init_delay = 0;
|
|
|
|
struct crb_addr_pair *buf;
|
|
|
|
unsigned long off;
|
|
|
|
|
|
|
|
/* resetall */
|
|
|
|
status = netxen_nic_get_board_info(adapter);
|
|
|
|
if (status)
|
2006-11-29 10:00:10 -07:00
|
|
|
printk("%s: netxen_pinit_from_rom: Error getting board info\n",
|
2006-10-21 12:33:03 -07:00
|
|
|
netxen_nic_driver_name);
|
|
|
|
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
|
|
|
|
NETXEN_ROMBUS_RESET);
|
|
|
|
|
|
|
|
if (verbose) {
|
|
|
|
int val;
|
|
|
|
if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
|
|
|
|
printk("P2 ROM board type: 0x%08x\n", val);
|
|
|
|
else
|
|
|
|
printk("Could not read board type\n");
|
|
|
|
if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
|
|
|
|
printk("P2 ROM board num: 0x%08x\n", val);
|
|
|
|
else
|
|
|
|
printk("Could not read board number\n");
|
|
|
|
if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
|
|
|
|
printk("P2 ROM chip num: 0x%08x\n", val);
|
|
|
|
else
|
|
|
|
printk("Could not read chip number\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
if (netxen_rom_fast_read(adapter, 0, &n) == 0
|
|
|
|
&& (n & NETXEN_ROM_FIRST_BARRIER)) {
|
|
|
|
n &= ~NETXEN_ROM_ROUNDUP;
|
|
|
|
if (n < NETXEN_ROM_FOUND_INIT) {
|
|
|
|
if (verbose)
|
|
|
|
printk("%s: %d CRB init values found"
|
|
|
|
" in ROM.\n", netxen_nic_driver_name, n);
|
|
|
|
} else {
|
|
|
|
printk("%s:n=0x%x Error! NetXen card flash not"
|
|
|
|
" initialized.\n", __FUNCTION__, n);
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
|
|
|
|
if (buf == NULL) {
|
2006-11-29 10:00:10 -07:00
|
|
|
printk("%s: netxen_pinit_from_rom: Unable to calloc "
|
|
|
|
"memory.\n", netxen_nic_driver_name);
|
2006-10-21 12:33:03 -07:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
for (i = 0; i < n; i++) {
|
|
|
|
if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
|
|
|
|
|| netxen_rom_fast_read(adapter, 8 * i + 8,
|
|
|
|
&addr) != 0)
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
buf[i].addr = addr;
|
|
|
|
buf[i].data = val;
|
|
|
|
|
|
|
|
if (verbose)
|
|
|
|
printk("%s: PCI: 0x%08x == 0x%08x\n",
|
|
|
|
netxen_nic_driver_name, (unsigned int)
|
|
|
|
netxen_decode_crb_addr((unsigned long)
|
|
|
|
addr), val);
|
|
|
|
}
|
|
|
|
for (i = 0; i < n; i++) {
|
|
|
|
|
|
|
|
off =
|
|
|
|
netxen_decode_crb_addr((unsigned long)buf[i].addr) +
|
|
|
|
NETXEN_PCI_CRBSPACE;
|
|
|
|
/* skipping cold reboot MAGIC */
|
|
|
|
if (off == NETXEN_CAM_RAM(0x1fc))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* After writing this register, HW needs time for CRB */
|
|
|
|
/* to quiet down (else crb_window returns 0xffffffff) */
|
|
|
|
if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
|
|
|
|
init_delay = 1;
|
|
|
|
/* hold xdma in reset also */
|
2006-11-29 10:00:10 -07:00
|
|
|
buf[i].data = NETXEN_NIC_XDMA_RESET;
|
2006-10-21 12:33:03 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ADDR_IN_WINDOW1(off)) {
|
|
|
|
writel(buf[i].data,
|
|
|
|
NETXEN_CRB_NORMALIZE(adapter, off));
|
|
|
|
} else {
|
|
|
|
netxen_nic_pci_change_crbwindow(adapter, 0);
|
|
|
|
writel(buf[i].data,
|
2006-11-29 10:00:10 -07:00
|
|
|
pci_base_offset(adapter, off));
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
netxen_nic_pci_change_crbwindow(adapter, 1);
|
|
|
|
}
|
|
|
|
if (init_delay == 1) {
|
|
|
|
ssleep(1);
|
|
|
|
init_delay = 0;
|
|
|
|
}
|
|
|
|
msleep(1);
|
|
|
|
}
|
|
|
|
kfree(buf);
|
|
|
|
|
|
|
|
/* disable_peg_cache_all */
|
|
|
|
|
|
|
|
/* unreset_net_cache */
|
|
|
|
netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
|
|
|
|
4);
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
|
|
|
|
(val & 0xffffff0f));
|
|
|
|
/* p2dn replyCount */
|
|
|
|
netxen_crb_writelit_adapter(adapter,
|
|
|
|
NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
|
|
|
|
/* disable_peg_cache 0 */
|
|
|
|
netxen_crb_writelit_adapter(adapter,
|
|
|
|
NETXEN_CRB_PEG_NET_D + 0x4c, 8);
|
|
|
|
/* disable_peg_cache 1 */
|
|
|
|
netxen_crb_writelit_adapter(adapter,
|
|
|
|
NETXEN_CRB_PEG_NET_I + 0x4c, 8);
|
|
|
|
|
|
|
|
/* peg_clr_all */
|
|
|
|
|
|
|
|
/* peg_clr 0 */
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
|
|
|
|
0);
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
|
|
|
|
0);
|
|
|
|
/* peg_clr 1 */
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
|
|
|
|
0);
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
|
|
|
|
0);
|
|
|
|
/* peg_clr 2 */
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
|
|
|
|
0);
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
|
|
|
|
0);
|
|
|
|
/* peg_clr 3 */
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
|
|
|
|
0);
|
|
|
|
netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
|
|
|
|
0);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-12-04 10:23:25 -07:00
|
|
|
int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
uint64_t addr;
|
|
|
|
uint32_t hi;
|
|
|
|
uint32_t lo;
|
|
|
|
|
|
|
|
adapter->dummy_dma.addr =
|
|
|
|
pci_alloc_consistent(adapter->ahw.pdev,
|
|
|
|
NETXEN_HOST_DUMMY_DMA_SIZE,
|
|
|
|
&adapter->dummy_dma.phys_addr);
|
|
|
|
if (adapter->dummy_dma.addr == NULL) {
|
|
|
|
printk("%s: ERROR: Could not allocate dummy DMA memory\n",
|
|
|
|
__FUNCTION__);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
addr = (uint64_t) adapter->dummy_dma.phys_addr;
|
|
|
|
hi = (addr >> 32) & 0xffffffff;
|
|
|
|
lo = addr & 0xffffffff;
|
|
|
|
|
|
|
|
writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
|
|
|
|
writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void netxen_free_adapter_offload(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
if (adapter->dummy_dma.addr) {
|
|
|
|
pci_free_consistent(adapter->ahw.pdev,
|
|
|
|
NETXEN_HOST_DUMMY_DMA_SIZE,
|
|
|
|
adapter->dummy_dma.addr,
|
|
|
|
adapter->dummy_dma.phys_addr);
|
|
|
|
adapter->dummy_dma.addr = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2006-11-29 10:00:10 -07:00
|
|
|
void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
|
2006-10-21 12:33:03 -07:00
|
|
|
{
|
|
|
|
u32 val = 0;
|
|
|
|
int loops = 0;
|
|
|
|
|
2006-11-29 10:00:10 -07:00
|
|
|
if (!pegtune_val) {
|
2006-10-21 12:33:03 -07:00
|
|
|
while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
|
|
|
|
udelay(100);
|
2006-11-29 10:00:10 -07:00
|
|
|
schedule();
|
2006-10-21 12:33:03 -07:00
|
|
|
val =
|
|
|
|
readl(NETXEN_CRB_NORMALIZE
|
|
|
|
(adapter, CRB_CMDPEG_STATE));
|
|
|
|
loops++;
|
|
|
|
}
|
|
|
|
if (val != PHAN_INITIALIZE_COMPLETE)
|
|
|
|
printk("WARNING: Initial boot wait loop failed...\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
int ctx;
|
|
|
|
|
|
|
|
for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
|
|
|
|
struct netxen_recv_context *recv_ctx =
|
|
|
|
&(adapter->recv_ctx[ctx]);
|
|
|
|
u32 consumer;
|
|
|
|
struct status_desc *desc_head;
|
2006-11-29 10:00:10 -07:00
|
|
|
struct status_desc *desc;
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
consumer = recv_ctx->status_rx_consumer;
|
|
|
|
desc_head = recv_ctx->rcv_status_desc_head;
|
|
|
|
desc = &desc_head[consumer];
|
|
|
|
|
2006-12-04 10:23:25 -07:00
|
|
|
if (((le16_to_cpu(netxen_get_sts_owner(desc)))
|
|
|
|
& STATUS_OWNER_HOST))
|
2006-10-21 12:33:03 -07:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-11-29 10:00:10 -07:00
|
|
|
static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
int port_num;
|
|
|
|
struct netxen_port *port;
|
|
|
|
struct net_device *netdev;
|
|
|
|
uint32_t temp, temp_state, temp_val;
|
|
|
|
int rv = 0;
|
|
|
|
|
|
|
|
temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
|
|
|
|
|
|
|
|
temp_state = nx_get_temp_state(temp);
|
|
|
|
temp_val = nx_get_temp_val(temp);
|
|
|
|
|
|
|
|
if (temp_state == NX_TEMP_PANIC) {
|
|
|
|
printk(KERN_ALERT
|
|
|
|
"%s: Device temperature %d degrees C exceeds"
|
|
|
|
" maximum allowed. Hardware has been shut down.\n",
|
|
|
|
netxen_nic_driver_name, temp_val);
|
|
|
|
for (port_num = 0; port_num < adapter->ahw.max_ports;
|
|
|
|
port_num++) {
|
|
|
|
port = adapter->port[port_num];
|
|
|
|
netdev = port->netdev;
|
|
|
|
|
|
|
|
netif_carrier_off(netdev);
|
|
|
|
netif_stop_queue(netdev);
|
|
|
|
}
|
|
|
|
rv = 1;
|
|
|
|
} else if (temp_state == NX_TEMP_WARN) {
|
|
|
|
if (adapter->temp == NX_TEMP_NORMAL) {
|
|
|
|
printk(KERN_ALERT
|
|
|
|
"%s: Device temperature %d degrees C "
|
|
|
|
"exceeds operating range."
|
|
|
|
" Immediate action needed.\n",
|
|
|
|
netxen_nic_driver_name, temp_val);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (adapter->temp == NX_TEMP_WARN) {
|
|
|
|
printk(KERN_INFO
|
|
|
|
"%s: Device temperature is now %d degrees C"
|
|
|
|
" in normal range.\n", netxen_nic_driver_name,
|
|
|
|
temp_val);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
adapter->temp = temp_state;
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
2006-12-05 12:36:26 -07:00
|
|
|
void netxen_watchdog_task(struct work_struct *work)
|
2006-10-21 12:33:03 -07:00
|
|
|
{
|
|
|
|
int port_num;
|
|
|
|
struct netxen_port *port;
|
|
|
|
struct net_device *netdev;
|
2006-12-05 12:36:26 -07:00
|
|
|
struct netxen_adapter *adapter =
|
|
|
|
container_of(work, struct netxen_adapter, watchdog_task);
|
2006-10-21 12:33:03 -07:00
|
|
|
|
2006-11-29 10:00:10 -07:00
|
|
|
if (netxen_nic_check_temp(adapter))
|
|
|
|
return;
|
|
|
|
|
2006-10-21 12:33:03 -07:00
|
|
|
for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
|
|
|
|
port = adapter->port[port_num];
|
|
|
|
netdev = port->netdev;
|
|
|
|
|
|
|
|
if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
|
|
|
|
printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
|
|
|
|
netxen_nic_driver_name, port_num, netdev->name);
|
|
|
|
netif_carrier_on(netdev);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (netif_queue_stopped(netdev))
|
|
|
|
netif_wake_queue(netdev);
|
|
|
|
}
|
|
|
|
|
2006-12-04 10:18:00 -07:00
|
|
|
if (adapter->handle_phy_intr)
|
|
|
|
adapter->handle_phy_intr(adapter);
|
2006-10-21 12:33:03 -07:00
|
|
|
mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* netxen_process_rcv() send the received packet to the protocol stack.
|
|
|
|
* and if the number of receives exceeds RX_BUFFERS_REFILL, then we
|
|
|
|
* invoke the routine to send more rx buffers to the Phantom...
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
|
|
|
|
struct status_desc *desc)
|
|
|
|
{
|
2006-12-04 10:23:25 -07:00
|
|
|
struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)];
|
2006-10-21 12:33:03 -07:00
|
|
|
struct pci_dev *pdev = port->pdev;
|
|
|
|
struct net_device *netdev = port->netdev;
|
2006-12-04 10:23:25 -07:00
|
|
|
int index = le16_to_cpu(netxen_get_sts_refhandle(desc));
|
2006-10-21 12:33:03 -07:00
|
|
|
struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
|
|
|
|
struct netxen_rx_buffer *buffer;
|
|
|
|
struct sk_buff *skb;
|
2006-12-04 10:23:25 -07:00
|
|
|
u32 length = le16_to_cpu(netxen_get_sts_totallength(desc));
|
2006-10-21 12:33:03 -07:00
|
|
|
u32 desc_ctx;
|
|
|
|
struct netxen_rcv_desc_ctx *rcv_desc;
|
|
|
|
int ret;
|
|
|
|
|
2006-12-04 10:23:25 -07:00
|
|
|
desc_ctx = netxen_get_sts_type(desc);
|
2006-10-21 12:33:03 -07:00
|
|
|
if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
|
|
|
|
printk("%s: %s Bad Rcv descriptor ring\n",
|
|
|
|
netxen_nic_driver_name, netdev->name);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
|
2006-12-04 10:23:25 -07:00
|
|
|
if (unlikely(index > rcv_desc->max_rx_desc_count)) {
|
|
|
|
DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
|
|
|
|
index, rcv_desc->max_rx_desc_count);
|
|
|
|
return;
|
|
|
|
}
|
2006-10-21 12:33:03 -07:00
|
|
|
buffer = &rcv_desc->rx_buf_arr[index];
|
2006-12-04 10:23:25 -07:00
|
|
|
if (desc_ctx == RCV_DESC_LRO_CTXID) {
|
|
|
|
buffer->lro_current_frags++;
|
|
|
|
if (netxen_get_sts_desc_lro_last_frag(desc)) {
|
|
|
|
buffer->lro_expected_frags =
|
|
|
|
netxen_get_sts_desc_lro_cnt(desc);
|
|
|
|
buffer->lro_length = length;
|
|
|
|
}
|
|
|
|
if (buffer->lro_current_frags != buffer->lro_expected_frags) {
|
|
|
|
if (buffer->lro_expected_frags != 0) {
|
|
|
|
printk("LRO: (refhandle:%x) recv frag."
|
|
|
|
"wait for last. flags: %x expected:%d"
|
|
|
|
"have:%d\n", index,
|
|
|
|
netxen_get_sts_desc_lro_last_frag(desc),
|
|
|
|
buffer->lro_expected_frags,
|
|
|
|
buffer->lro_current_frags);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
|
|
|
|
PCI_DMA_FROMDEVICE);
|
|
|
|
|
|
|
|
skb = (struct sk_buff *)buffer->skb;
|
|
|
|
|
2006-12-04 10:23:25 -07:00
|
|
|
if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
|
2006-10-21 12:33:03 -07:00
|
|
|
port->stats.csummed++;
|
|
|
|
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
2006-12-04 10:23:25 -07:00
|
|
|
}
|
2006-10-21 12:33:03 -07:00
|
|
|
skb->dev = netdev;
|
2006-12-04 10:23:25 -07:00
|
|
|
if (desc_ctx == RCV_DESC_LRO_CTXID) {
|
|
|
|
/* True length was only available on the last pkt */
|
|
|
|
skb_put(skb, buffer->lro_length);
|
|
|
|
} else {
|
|
|
|
skb_put(skb, length);
|
|
|
|
}
|
|
|
|
|
2006-10-21 12:33:03 -07:00
|
|
|
skb->protocol = eth_type_trans(skb, netdev);
|
|
|
|
|
|
|
|
ret = netif_receive_skb(skb);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* RH: Do we need these stats on a regular basis. Can we get it from
|
|
|
|
* Linux stats.
|
|
|
|
*/
|
|
|
|
switch (ret) {
|
|
|
|
case NET_RX_SUCCESS:
|
|
|
|
port->stats.uphappy++;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case NET_RX_CN_LOW:
|
|
|
|
port->stats.uplcong++;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case NET_RX_CN_MOD:
|
|
|
|
port->stats.upmcong++;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case NET_RX_CN_HIGH:
|
|
|
|
port->stats.uphcong++;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case NET_RX_DROP:
|
|
|
|
port->stats.updropped++;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
port->stats.updunno++;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
netdev->last_rx = jiffies;
|
|
|
|
|
|
|
|
rcv_desc->rcv_free++;
|
|
|
|
rcv_desc->rcv_pending--;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We just consumed one buffer so post a buffer.
|
|
|
|
*/
|
|
|
|
adapter->stats.post_called++;
|
|
|
|
buffer->skb = NULL;
|
|
|
|
buffer->state = NETXEN_BUFFER_FREE;
|
2006-12-04 10:23:25 -07:00
|
|
|
buffer->lro_current_frags = 0;
|
|
|
|
buffer->lro_expected_frags = 0;
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
port->stats.no_rcv++;
|
|
|
|
port->stats.rxbytes += length;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Receive status ring */
|
|
|
|
u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
|
|
|
|
{
|
|
|
|
struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
|
|
|
|
struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
|
|
|
|
struct status_desc *desc; /* used to read status desc here */
|
|
|
|
u32 consumer = recv_ctx->status_rx_consumer;
|
2006-12-04 10:23:25 -07:00
|
|
|
u32 producer = 0;
|
2006-10-21 12:33:03 -07:00
|
|
|
int count = 0, ring;
|
|
|
|
|
|
|
|
DPRINTK(INFO, "procesing receive\n");
|
|
|
|
/*
|
|
|
|
* we assume in this case that there is only one port and that is
|
|
|
|
* port #1...changes need to be done in firmware to indicate port
|
|
|
|
* number as part of the descriptor. This way we will be able to get
|
|
|
|
* the netdev which is associated with that device.
|
|
|
|
*/
|
|
|
|
while (count < max) {
|
|
|
|
desc = &desc_head[consumer];
|
2006-12-04 10:23:25 -07:00
|
|
|
if (!
|
|
|
|
(le16_to_cpu(netxen_get_sts_owner(desc)) &
|
|
|
|
STATUS_OWNER_HOST)) {
|
|
|
|
DPRINTK(ERR, "desc %p ownedby %x\n", desc,
|
|
|
|
netxen_get_sts_owner(desc));
|
2006-10-21 12:33:03 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
netxen_process_rcv(adapter, ctxid, desc);
|
2006-12-04 10:23:25 -07:00
|
|
|
netxen_clear_sts_owner(desc);
|
|
|
|
netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
|
2006-10-21 12:33:03 -07:00
|
|
|
consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
|
|
|
|
count++;
|
|
|
|
}
|
|
|
|
if (count) {
|
|
|
|
for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
|
2006-12-04 10:23:25 -07:00
|
|
|
netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
|
2006-10-21 12:33:03 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* update the consumer index in phantom */
|
|
|
|
if (count) {
|
|
|
|
adapter->stats.process_rcv++;
|
|
|
|
recv_ctx->status_rx_consumer = consumer;
|
2006-12-04 10:23:25 -07:00
|
|
|
recv_ctx->status_rx_producer = producer;
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
/* Window = 1 */
|
|
|
|
writel(consumer,
|
|
|
|
NETXEN_CRB_NORMALIZE(adapter,
|
|
|
|
recv_crb_registers[ctxid].
|
|
|
|
crb_rcv_status_consumer));
|
|
|
|
}
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Command status ring */
|
2006-12-04 10:23:25 -07:00
|
|
|
int netxen_process_cmd_ring(unsigned long data)
|
2006-10-21 12:33:03 -07:00
|
|
|
{
|
|
|
|
u32 last_consumer;
|
|
|
|
u32 consumer;
|
|
|
|
struct netxen_adapter *adapter = (struct netxen_adapter *)data;
|
2006-12-04 10:23:25 -07:00
|
|
|
int count1 = 0;
|
|
|
|
int count2 = 0;
|
2006-10-21 12:33:03 -07:00
|
|
|
struct netxen_cmd_buffer *buffer;
|
|
|
|
struct netxen_port *port; /* port #1 */
|
|
|
|
struct netxen_port *nport;
|
|
|
|
struct pci_dev *pdev;
|
|
|
|
struct netxen_skb_frag *frag;
|
|
|
|
u32 i;
|
|
|
|
struct sk_buff *skb = NULL;
|
|
|
|
int p;
|
2006-12-04 10:23:25 -07:00
|
|
|
int done;
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
spin_lock(&adapter->tx_lock);
|
|
|
|
last_consumer = adapter->last_cmd_consumer;
|
|
|
|
DPRINTK(INFO, "procesing xmit complete\n");
|
|
|
|
/* we assume in this case that there is only one port and that is
|
|
|
|
* port #1...changes need to be done in firmware to indicate port
|
|
|
|
* number as part of the descriptor. This way we will be able to get
|
|
|
|
* the netdev which is associated with that device.
|
|
|
|
*/
|
|
|
|
|
2006-12-04 10:23:25 -07:00
|
|
|
consumer = *(adapter->cmd_consumer);
|
2006-10-21 12:33:03 -07:00
|
|
|
if (last_consumer == consumer) { /* Ring is empty */
|
|
|
|
DPRINTK(INFO, "last_consumer %d == consumer %d\n",
|
|
|
|
last_consumer, consumer);
|
|
|
|
spin_unlock(&adapter->tx_lock);
|
2006-12-04 10:23:25 -07:00
|
|
|
return 1;
|
2006-10-21 12:33:03 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
adapter->proc_cmd_buf_counter++;
|
|
|
|
adapter->stats.process_xmit++;
|
|
|
|
/*
|
|
|
|
* Not needed - does not seem to be used anywhere.
|
|
|
|
* adapter->cmd_consumer = consumer;
|
|
|
|
*/
|
|
|
|
spin_unlock(&adapter->tx_lock);
|
|
|
|
|
2006-12-04 10:23:25 -07:00
|
|
|
while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
|
2006-10-21 12:33:03 -07:00
|
|
|
buffer = &adapter->cmd_buf_arr[last_consumer];
|
|
|
|
port = adapter->port[buffer->port];
|
|
|
|
pdev = port->pdev;
|
|
|
|
frag = &buffer->frag_array[0];
|
|
|
|
skb = buffer->skb;
|
|
|
|
if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
|
|
|
|
pci_unmap_single(pdev, frag->dma, frag->length,
|
|
|
|
PCI_DMA_TODEVICE);
|
|
|
|
for (i = 1; i < buffer->frag_count; i++) {
|
|
|
|
DPRINTK(INFO, "getting fragment no %d\n", i);
|
|
|
|
frag++; /* Get the next frag */
|
|
|
|
pci_unmap_page(pdev, frag->dma, frag->length,
|
|
|
|
PCI_DMA_TODEVICE);
|
|
|
|
}
|
|
|
|
|
|
|
|
port->stats.skbfreed++;
|
|
|
|
dev_kfree_skb_any(skb);
|
|
|
|
skb = NULL;
|
|
|
|
} else if (adapter->proc_cmd_buf_counter == 1) {
|
|
|
|
port->stats.txnullskb++;
|
|
|
|
}
|
|
|
|
if (unlikely(netif_queue_stopped(port->netdev)
|
|
|
|
&& netif_carrier_ok(port->netdev))
|
|
|
|
&& ((jiffies - port->netdev->trans_start) >
|
|
|
|
port->netdev->watchdog_timeo)) {
|
2006-12-18 06:53:36 -07:00
|
|
|
SCHEDULE_WORK(&port->tx_timeout_task);
|
2006-10-21 12:33:03 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
last_consumer = get_next_index(last_consumer,
|
|
|
|
adapter->max_tx_desc_count);
|
2006-12-04 10:23:25 -07:00
|
|
|
count1++;
|
2006-10-21 12:33:03 -07:00
|
|
|
}
|
2006-12-04 10:23:25 -07:00
|
|
|
adapter->stats.noxmitdone += count1;
|
2006-10-21 12:33:03 -07:00
|
|
|
|
2006-12-04 10:23:25 -07:00
|
|
|
count2 = 0;
|
2006-10-21 12:33:03 -07:00
|
|
|
spin_lock(&adapter->tx_lock);
|
|
|
|
if ((--adapter->proc_cmd_buf_counter) == 0) {
|
|
|
|
adapter->last_cmd_consumer = last_consumer;
|
|
|
|
while ((adapter->last_cmd_consumer != consumer)
|
2006-12-04 10:23:25 -07:00
|
|
|
&& (count2 < MAX_STATUS_HANDLE)) {
|
2006-10-21 12:33:03 -07:00
|
|
|
buffer =
|
|
|
|
&adapter->cmd_buf_arr[adapter->last_cmd_consumer];
|
2006-12-04 10:23:25 -07:00
|
|
|
count2++;
|
2006-10-21 12:33:03 -07:00
|
|
|
if (buffer->skb)
|
|
|
|
break;
|
|
|
|
else
|
|
|
|
adapter->last_cmd_consumer =
|
|
|
|
get_next_index(adapter->last_cmd_consumer,
|
|
|
|
adapter->max_tx_desc_count);
|
|
|
|
}
|
|
|
|
}
|
2006-12-04 10:23:25 -07:00
|
|
|
if (count1 || count2) {
|
2006-10-21 12:33:03 -07:00
|
|
|
for (p = 0; p < adapter->ahw.max_ports; p++) {
|
|
|
|
nport = adapter->port[p];
|
|
|
|
if (netif_queue_stopped(nport->netdev)
|
|
|
|
&& (nport->flags & NETXEN_NETDEV_STATUS)) {
|
|
|
|
netif_wake_queue(nport->netdev);
|
|
|
|
nport->flags &= ~NETXEN_NETDEV_STATUS;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2006-12-04 10:23:25 -07:00
|
|
|
/*
|
|
|
|
* If everything is freed up to consumer then check if the ring is full
|
|
|
|
* If the ring is full then check if more needs to be freed and
|
|
|
|
* schedule the call back again.
|
|
|
|
*
|
|
|
|
* This happens when there are 2 CPUs. One could be freeing and the
|
|
|
|
* other filling it. If the ring is full when we get out of here and
|
|
|
|
* the card has already interrupted the host then the host can miss the
|
|
|
|
* interrupt.
|
|
|
|
*
|
|
|
|
* There is still a possible race condition and the host could miss an
|
|
|
|
* interrupt. The card has to take care of this.
|
|
|
|
*/
|
|
|
|
if (adapter->last_cmd_consumer == consumer &&
|
|
|
|
(((adapter->cmd_producer + 1) %
|
|
|
|
adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
|
|
|
|
consumer = *(adapter->cmd_consumer);
|
|
|
|
}
|
|
|
|
done = (adapter->last_cmd_consumer == consumer);
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
spin_unlock(&adapter->tx_lock);
|
|
|
|
DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
|
|
|
|
__FUNCTION__);
|
2006-12-04 10:23:25 -07:00
|
|
|
return (done);
|
2006-10-21 12:33:03 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* netxen_post_rx_buffers puts buffer in the Phantom memory
|
|
|
|
*/
|
|
|
|
void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = adapter->ahw.pdev;
|
|
|
|
struct sk_buff *skb;
|
|
|
|
struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
|
|
|
|
struct netxen_rcv_desc_ctx *rcv_desc = NULL;
|
2006-12-04 10:23:25 -07:00
|
|
|
uint producer;
|
2006-10-21 12:33:03 -07:00
|
|
|
struct rcv_desc *pdesc;
|
|
|
|
struct netxen_rx_buffer *buffer;
|
|
|
|
int count = 0;
|
|
|
|
int index = 0;
|
2006-12-04 10:23:25 -07:00
|
|
|
netxen_ctx_msg msg = 0;
|
|
|
|
dma_addr_t dma;
|
2006-10-21 12:33:03 -07:00
|
|
|
|
|
|
|
adapter->stats.post_called++;
|
|
|
|
rcv_desc = &recv_ctx->rcv_desc[ringid];
|
|
|
|
|
|
|
|
producer = rcv_desc->producer;
|
|
|
|
index = rcv_desc->begin_alloc;
|
|
|
|
buffer = &rcv_desc->rx_buf_arr[index];
|
|
|
|
/* We can start writing rx descriptors into the phantom memory. */
|
|
|
|
while (buffer->state == NETXEN_BUFFER_FREE) {
|
|
|
|
skb = dev_alloc_skb(rcv_desc->skb_size);
|
|
|
|
if (unlikely(!skb)) {
|
|
|
|
/*
|
2006-12-04 10:23:25 -07:00
|
|
|
* TODO
|
2006-10-21 12:33:03 -07:00
|
|
|
* We need to schedule the posting of buffers to the pegs.
|
|
|
|
*/
|
|
|
|
rcv_desc->begin_alloc = index;
|
2006-11-29 10:00:10 -07:00
|
|
|
DPRINTK(ERR, "netxen_post_rx_buffers: "
|
2006-10-21 12:33:03 -07:00
|
|
|
" allocated only %d buffers\n", count);
|
|
|
|
break;
|
|
|
|
}
|
2006-12-04 10:23:25 -07:00
|
|
|
|
|
|
|
count++; /* now there should be no failure */
|
|
|
|
pdesc = &rcv_desc->desc_head[producer];
|
|
|
|
|
|
|
|
#if defined(XGB_DEBUG)
|
|
|
|
*(unsigned long *)(skb->head) = 0xc0debabe;
|
|
|
|
if (skb_is_nonlinear(skb)) {
|
|
|
|
printk("Allocated SKB @%p is nonlinear\n");
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
skb_reserve(skb, 2);
|
|
|
|
/* This will be setup when we receive the
|
|
|
|
* buffer after it has been filled FSL TBD TBD
|
|
|
|
* skb->dev = netdev;
|
|
|
|
*/
|
|
|
|
dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
|
|
|
|
PCI_DMA_FROMDEVICE);
|
|
|
|
pdesc->addr_buffer = dma;
|
|
|
|
buffer->skb = skb;
|
|
|
|
buffer->state = NETXEN_BUFFER_BUSY;
|
|
|
|
buffer->dma = dma;
|
|
|
|
/* make a rcv descriptor */
|
|
|
|
pdesc->reference_handle = buffer->ref_handle;
|
|
|
|
pdesc->buffer_length = rcv_desc->dma_size;
|
|
|
|
DPRINTK(INFO, "done writing descripter\n");
|
|
|
|
producer =
|
|
|
|
get_next_index(producer, rcv_desc->max_rx_desc_count);
|
|
|
|
index = get_next_index(index, rcv_desc->max_rx_desc_count);
|
|
|
|
buffer = &rcv_desc->rx_buf_arr[index];
|
|
|
|
}
|
|
|
|
/* if we did allocate buffers, then write the count to Phantom */
|
|
|
|
if (count) {
|
|
|
|
rcv_desc->begin_alloc = index;
|
|
|
|
rcv_desc->rcv_pending += count;
|
|
|
|
adapter->stats.lastposted = count;
|
|
|
|
adapter->stats.posted += count;
|
|
|
|
rcv_desc->producer = producer;
|
|
|
|
if (rcv_desc->rcv_free >= 32) {
|
|
|
|
rcv_desc->rcv_free = 0;
|
|
|
|
/* Window = 1 */
|
|
|
|
writel((producer - 1) &
|
|
|
|
(rcv_desc->max_rx_desc_count - 1),
|
|
|
|
NETXEN_CRB_NORMALIZE(adapter,
|
|
|
|
recv_crb_registers[0].
|
|
|
|
rcv_desc_crb[ringid].
|
|
|
|
crb_rcv_producer_offset));
|
|
|
|
/*
|
|
|
|
* Write a doorbell msg to tell phanmon of change in
|
|
|
|
* receive ring producer
|
|
|
|
*/
|
|
|
|
netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
|
|
|
|
netxen_set_msg_privid(msg);
|
|
|
|
netxen_set_msg_count(msg,
|
|
|
|
((producer -
|
|
|
|
1) & (rcv_desc->
|
|
|
|
max_rx_desc_count - 1)));
|
|
|
|
netxen_set_msg_ctxid(msg, 0);
|
|
|
|
netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
|
|
|
|
writel(msg,
|
|
|
|
DB_NORMALIZE(adapter,
|
|
|
|
NETXEN_RCV_PRODUCER_OFFSET));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
|
|
|
|
uint32_t ringid)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = adapter->ahw.pdev;
|
|
|
|
struct sk_buff *skb;
|
|
|
|
struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
|
|
|
|
struct netxen_rcv_desc_ctx *rcv_desc = NULL;
|
|
|
|
u32 producer;
|
|
|
|
struct rcv_desc *pdesc;
|
|
|
|
struct netxen_rx_buffer *buffer;
|
|
|
|
int count = 0;
|
|
|
|
int index = 0;
|
|
|
|
|
|
|
|
adapter->stats.post_called++;
|
|
|
|
rcv_desc = &recv_ctx->rcv_desc[ringid];
|
|
|
|
|
|
|
|
producer = rcv_desc->producer;
|
|
|
|
index = rcv_desc->begin_alloc;
|
|
|
|
buffer = &rcv_desc->rx_buf_arr[index];
|
|
|
|
/* We can start writing rx descriptors into the phantom memory. */
|
|
|
|
while (buffer->state == NETXEN_BUFFER_FREE) {
|
|
|
|
skb = dev_alloc_skb(rcv_desc->skb_size);
|
|
|
|
if (unlikely(!skb)) {
|
|
|
|
/*
|
|
|
|
* We need to schedule the posting of buffers to the pegs.
|
|
|
|
*/
|
|
|
|
rcv_desc->begin_alloc = index;
|
|
|
|
DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
|
|
|
|
" allocated only %d buffers\n", count);
|
|
|
|
break;
|
|
|
|
}
|
2006-10-21 12:33:03 -07:00
|
|
|
count++; /* now there should be no failure */
|
|
|
|
pdesc = &rcv_desc->desc_head[producer];
|
2006-12-04 10:23:25 -07:00
|
|
|
skb_reserve(skb, 2);
|
2006-10-21 12:33:03 -07:00
|
|
|
/*
|
|
|
|
* This will be setup when we receive the
|
|
|
|
* buffer after it has been filled
|
|
|
|
* skb->dev = netdev;
|
|
|
|
*/
|
|
|
|
buffer->skb = skb;
|
|
|
|
buffer->state = NETXEN_BUFFER_BUSY;
|
|
|
|
buffer->dma = pci_map_single(pdev, skb->data,
|
|
|
|
rcv_desc->dma_size,
|
|
|
|
PCI_DMA_FROMDEVICE);
|
2006-12-04 10:23:25 -07:00
|
|
|
|
2006-10-21 12:33:03 -07:00
|
|
|
/* make a rcv descriptor */
|
|
|
|
pdesc->reference_handle = le16_to_cpu(buffer->ref_handle);
|
|
|
|
pdesc->buffer_length = le16_to_cpu(rcv_desc->dma_size);
|
|
|
|
pdesc->addr_buffer = cpu_to_le64(buffer->dma);
|
|
|
|
DPRINTK(INFO, "done writing descripter\n");
|
|
|
|
producer =
|
|
|
|
get_next_index(producer, rcv_desc->max_rx_desc_count);
|
|
|
|
index = get_next_index(index, rcv_desc->max_rx_desc_count);
|
|
|
|
buffer = &rcv_desc->rx_buf_arr[index];
|
|
|
|
}
|
|
|
|
|
|
|
|
/* if we did allocate buffers, then write the count to Phantom */
|
|
|
|
if (count) {
|
|
|
|
rcv_desc->begin_alloc = index;
|
|
|
|
rcv_desc->rcv_pending += count;
|
|
|
|
adapter->stats.lastposted = count;
|
|
|
|
adapter->stats.posted += count;
|
|
|
|
rcv_desc->producer = producer;
|
|
|
|
if (rcv_desc->rcv_free >= 32) {
|
|
|
|
rcv_desc->rcv_free = 0;
|
|
|
|
/* Window = 1 */
|
|
|
|
writel((producer - 1) &
|
|
|
|
(rcv_desc->max_rx_desc_count - 1),
|
|
|
|
NETXEN_CRB_NORMALIZE(adapter,
|
2006-12-04 10:23:25 -07:00
|
|
|
recv_crb_registers[0].
|
|
|
|
rcv_desc_crb[ringid].
|
2006-10-21 12:33:03 -07:00
|
|
|
crb_rcv_producer_offset));
|
|
|
|
wmb();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
if (find_diff_among(adapter->last_cmd_consumer,
|
|
|
|
adapter->cmd_producer,
|
|
|
|
adapter->max_tx_desc_count) > 0)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
netxen_nic_fill_statistics(struct netxen_adapter *adapter,
|
|
|
|
struct netxen_port *port,
|
|
|
|
struct netxen_statistics *netxen_stats)
|
|
|
|
{
|
|
|
|
void __iomem *addr;
|
|
|
|
|
|
|
|
if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
|
|
|
|
netxen_nic_pci_change_crbwindow(adapter, 0);
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_BYTE_CNT,
|
|
|
|
&(netxen_stats->tx_bytes));
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_FRAME_CNT,
|
|
|
|
&(netxen_stats->tx_packets));
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_BYTE_CNT,
|
|
|
|
&(netxen_stats->rx_bytes));
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_FRAME_CNT,
|
|
|
|
&(netxen_stats->rx_packets));
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_AGGR_ERROR_CNT,
|
|
|
|
&(netxen_stats->rx_errors));
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_CRC_ERROR_CNT,
|
|
|
|
&(netxen_stats->rx_crc_errors));
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
|
|
|
|
&(netxen_stats->
|
|
|
|
rx_long_length_error));
|
|
|
|
NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
|
|
|
|
&(netxen_stats->
|
|
|
|
rx_short_length_error));
|
|
|
|
|
|
|
|
netxen_nic_pci_change_crbwindow(adapter, 1);
|
|
|
|
} else {
|
|
|
|
spin_lock_bh(&adapter->tx_lock);
|
|
|
|
netxen_stats->tx_bytes = port->stats.txbytes;
|
|
|
|
netxen_stats->tx_packets = port->stats.xmitedframes +
|
|
|
|
port->stats.xmitfinished;
|
|
|
|
netxen_stats->rx_bytes = port->stats.rxbytes;
|
|
|
|
netxen_stats->rx_packets = port->stats.no_rcv;
|
|
|
|
netxen_stats->rx_errors = port->stats.rcvdbadskb;
|
|
|
|
netxen_stats->tx_errors = port->stats.nocmddescriptor;
|
|
|
|
netxen_stats->rx_short_length_error = port->stats.uplcong;
|
|
|
|
netxen_stats->rx_long_length_error = port->stats.uphcong;
|
|
|
|
netxen_stats->rx_crc_errors = 0;
|
|
|
|
netxen_stats->rx_mac_errors = 0;
|
|
|
|
spin_unlock_bh(&adapter->tx_lock);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void netxen_nic_clear_stats(struct netxen_adapter *adapter)
|
|
|
|
{
|
|
|
|
struct netxen_port *port;
|
|
|
|
int port_num;
|
|
|
|
|
|
|
|
memset(&adapter->stats, 0, sizeof(adapter->stats));
|
|
|
|
for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
|
|
|
|
port = adapter->port[port_num];
|
|
|
|
memset(&port->stats, 0, sizeof(port->stats));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
netxen_nic_clear_statistics(struct netxen_adapter *adapter,
|
|
|
|
struct netxen_port *port)
|
|
|
|
{
|
|
|
|
int data = 0;
|
|
|
|
|
|
|
|
netxen_nic_pci_change_crbwindow(adapter, 0);
|
|
|
|
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_BYTE_CNT, &data);
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_FRAME_CNT,
|
|
|
|
&data);
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_BYTE_CNT, &data);
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_FRAME_CNT,
|
|
|
|
&data);
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_AGGR_ERROR_CNT,
|
|
|
|
&data);
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_CRC_ERROR_CNT,
|
|
|
|
&data);
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
|
|
|
|
&data);
|
|
|
|
netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
|
|
|
|
&data);
|
|
|
|
|
|
|
|
netxen_nic_pci_change_crbwindow(adapter, 1);
|
|
|
|
netxen_nic_clear_stats(adapter);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
netxen_nic_do_ioctl(struct netxen_adapter *adapter, void *u_data,
|
|
|
|
struct netxen_port *port)
|
|
|
|
{
|
|
|
|
struct netxen_nic_ioctl_data data;
|
|
|
|
struct netxen_nic_ioctl_data *up_data;
|
|
|
|
int retval = 0;
|
|
|
|
struct netxen_statistics netxen_stats;
|
|
|
|
|
|
|
|
up_data = (void *)u_data;
|
|
|
|
|
|
|
|
DPRINTK(INFO, "doing ioctl for %p\n", adapter);
|
|
|
|
if (copy_from_user(&data, (void __user *)up_data, sizeof(data))) {
|
|
|
|
/* evil user tried to crash the kernel */
|
|
|
|
DPRINTK(ERR, "bad copy from userland: %d\n", (int)sizeof(data));
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Shouldn't access beyond legal limits of "char u[64];" member */
|
|
|
|
if (!data.ptr && (data.size > sizeof(data.u))) {
|
|
|
|
/* evil user tried to crash the kernel */
|
|
|
|
DPRINTK(ERR, "bad size: %d\n", data.size);
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (data.cmd) {
|
|
|
|
case netxen_nic_cmd_pci_read:
|
2006-12-04 10:23:25 -07:00
|
|
|
if ((retval = netxen_nic_hw_read_ioctl(adapter, data.off,
|
|
|
|
&(data.u), data.size)))
|
2006-10-21 12:33:03 -07:00
|
|
|
goto error_out;
|
|
|
|
if (copy_to_user
|
|
|
|
((void __user *)&(up_data->u), &(data.u), data.size)) {
|
|
|
|
DPRINTK(ERR, "bad copy to userland: %d\n",
|
|
|
|
(int)sizeof(data));
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
data.rv = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_pci_write:
|
2006-12-04 10:23:25 -07:00
|
|
|
if ((retval = netxen_nic_hw_write_ioctl(adapter, data.off,
|
|
|
|
&(data.u), data.size)))
|
|
|
|
goto error_out;
|
|
|
|
data.rv = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_pci_mem_read:
|
|
|
|
if (netxen_nic_pci_mem_read_ioctl(adapter, data.off, &(data.u),
|
|
|
|
data.size)) {
|
|
|
|
DPRINTK(ERR, "Failed to read the data.\n");
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
if (copy_to_user
|
|
|
|
((void __user *)&(up_data->u), &(data.u), data.size)) {
|
|
|
|
DPRINTK(ERR, "bad copy to userland: %d\n",
|
|
|
|
(int)sizeof(data));
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
data.rv = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_pci_mem_write:
|
|
|
|
if ((retval = netxen_nic_pci_mem_write_ioctl(adapter, data.off,
|
|
|
|
&(data.u),
|
|
|
|
data.size)))
|
|
|
|
goto error_out;
|
|
|
|
data.rv = 0;
|
2006-10-21 12:33:03 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_pci_config_read:
|
|
|
|
switch (data.size) {
|
|
|
|
case 1:
|
|
|
|
data.rv = pci_read_config_byte(adapter->ahw.pdev,
|
|
|
|
data.off,
|
|
|
|
(char *)&(data.u));
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
data.rv = pci_read_config_word(adapter->ahw.pdev,
|
|
|
|
data.off,
|
|
|
|
(short *)&(data.u));
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
data.rv = pci_read_config_dword(adapter->ahw.pdev,
|
|
|
|
data.off,
|
|
|
|
(u32 *) & (data.u));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (copy_to_user
|
|
|
|
((void __user *)&(up_data->u), &(data.u), data.size)) {
|
|
|
|
DPRINTK(ERR, "bad copy to userland: %d\n",
|
|
|
|
(int)sizeof(data));
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_pci_config_write:
|
|
|
|
switch (data.size) {
|
|
|
|
case 1:
|
|
|
|
data.rv = pci_write_config_byte(adapter->ahw.pdev,
|
|
|
|
data.off,
|
|
|
|
*(char *)&(data.u));
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
data.rv = pci_write_config_word(adapter->ahw.pdev,
|
|
|
|
data.off,
|
|
|
|
*(short *)&(data.u));
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
data.rv = pci_write_config_dword(adapter->ahw.pdev,
|
|
|
|
data.off,
|
|
|
|
*(u32 *) & (data.u));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_get_stats:
|
|
|
|
data.rv =
|
|
|
|
netxen_nic_fill_statistics(adapter, port, &netxen_stats);
|
|
|
|
if (copy_to_user
|
|
|
|
((void __user *)(up_data->ptr), (void *)&netxen_stats,
|
|
|
|
sizeof(struct netxen_statistics))) {
|
|
|
|
DPRINTK(ERR, "bad copy to userland: %d\n",
|
|
|
|
(int)sizeof(netxen_stats));
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
up_data->rv = data.rv;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_clear_stats:
|
|
|
|
data.rv = netxen_nic_clear_statistics(adapter, port);
|
|
|
|
up_data->rv = data.rv;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case netxen_nic_cmd_get_version:
|
|
|
|
if (copy_to_user
|
|
|
|
((void __user *)&(up_data->u), NETXEN_NIC_LINUX_VERSIONID,
|
|
|
|
sizeof(NETXEN_NIC_LINUX_VERSIONID))) {
|
|
|
|
DPRINTK(ERR, "bad copy to userland: %d\n",
|
|
|
|
(int)sizeof(data));
|
|
|
|
retval = -EFAULT;
|
|
|
|
goto error_out;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
DPRINTK(INFO, "bad command %d for %p\n", data.cmd, adapter);
|
|
|
|
retval = -EOPNOTSUPP;
|
|
|
|
goto error_out;
|
|
|
|
}
|
2006-12-04 10:23:25 -07:00
|
|
|
put_user(data.rv, (&(up_data->rv)));
|
2006-10-21 12:33:03 -07:00
|
|
|
DPRINTK(INFO, "done ioctl for %p well.\n", adapter);
|
|
|
|
|
|
|
|
error_out:
|
|
|
|
return retval;
|
|
|
|
}
|