2005-04-16 15:20:36 -07:00
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/*
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* include/asm-arm/arch-integrator/entry-macro.S
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*
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* Low-level IRQ helper macros for Integrator platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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2006-01-03 10:39:34 -07:00
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#include <asm/hardware.h>
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#include <asm/arch/irqs.h>
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2005-04-16 15:20:36 -07:00
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.macro disable_fiq
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.endm
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2007-02-16 14:16:32 -07:00
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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2005-04-16 15:20:36 -07:00
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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/* FIXME: should not be using soo many LDRs here */
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ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
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mov \irqnr, #IRQ_PIC_START
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ldr \irqstat, [\base, #IRQ_STATUS] @ get masked status
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ldr \base, =IO_ADDRESS(INTEGRATOR_HDR_BASE)
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teq \irqstat, #0
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ldreq \irqstat, [\base, #(INTEGRATOR_HDR_IC_OFFSET+IRQ_STATUS)]
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moveq \irqnr, #IRQ_CIC_START
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1001: tst \irqstat, #15
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bne 1002f
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add \irqnr, \irqnr, #4
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movs \irqstat, \irqstat, lsr #4
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bne 1001b
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1002: tst \irqstat, #1
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bne 1003f
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add \irqnr, \irqnr, #1
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movs \irqstat, \irqstat, lsr #1
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bne 1002b
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1003: /* EQ will be set if no irqs pending */
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.endm
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