2005-04-16 15:20:36 -07:00
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/* $Id: head.S,v 1.7 2003/09/01 17:58:19 lethal Exp $
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*
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* arch/sh/kernel/head.S
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*
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* Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Head.S contains the SH exception handlers and startup code.
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*/
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#include <linux/linkage.h>
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.section .empty_zero_page, "aw"
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ENTRY(empty_zero_page)
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.long 1 /* MOUNT_ROOT_RDONLY */
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.long 0 /* RAMDISK_FLAGS */
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.long 0x0200 /* ORIG_ROOT_DEV */
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.long 1 /* LOADER_TYPE */
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.long 0x00360000 /* INITRD_START */
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.long 0x000a0000 /* INITRD_SIZE */
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.long 0
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.balign 4096,0,4096
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.text
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/*
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* Condition at the entry of _stext:
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*
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* BSC has already been initialized.
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* INTC may or may not be initialized.
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* VBR may or may not be initialized.
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* MMU may or may not be initialized.
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* Cache may or may not be initialized.
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* Hardware (including on-chip modules) may or may not be initialized.
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*
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*/
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ENTRY(_stext)
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! Initialize Status Register
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mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
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ldc r0, sr
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! Initialize global interrupt mask
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mov #0, r0
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ldc r0, r6_bank
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!
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mov.l 2f, r0
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mov r0, r15 ! Set initial r15 (stack pointer)
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mov #0x20, r1 !
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shll8 r1 ! r1 = 8192
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sub r1, r0 !
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ldc r0, r7_bank ! ... and initial thread_info
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!
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! Additional CPU initialization
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mov.l 6f, r0
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jsr @r0
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nop
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! Clear BSS area
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mov.l 3f, r1
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add #4, r1
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mov.l 4f, r2
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mov #0, r0
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9: cmp/hs r2, r1
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bf/s 9b ! while (r1 < r2)
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mov.l r0,@-r2
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! Start kernel
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mov.l 5f, r0
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jmp @r0
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nop
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.balign 4
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1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
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2006-09-26 19:40:05 -07:00
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2: .long init_thread_union+8192
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2005-04-16 15:20:36 -07:00
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3: .long __bss_start
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4: .long _end
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5: .long start_kernel
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6: .long sh_cpu_init
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