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linux/include/asm-arm/arch-ep93xx/entry-macro.S

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[ARM] 3369/1: ep93xx: add core cirrus ep93xx support Patch from Lennert Buytenhek This patch adds support for the Cirrus ep93xx series of CPUs. The ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs, IrDA, MaverickCrunch floating point coprocessor, between 24 and 64 GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster engine, graphics accelerator, IDE controller and a bunch of other stuff. This patch adds the core ep93xx support code, and support for the Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-20 10:10:13 -07:00
/*
* linux/include/asm-arm/arch-ep93xx/entry-macro.S
* IRQ demultiplexing for EP93xx
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <asm/arch/ep93xx-regs.h>
.macro disable_fiq
.endm
[ARM] 4185/2: entry: introduce get_irqnr_preamble and arch_ret_to_user get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-02-16 14:16:32 -07:00
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
[ARM] 3369/1: ep93xx: add core cirrus ep93xx support Patch from Lennert Buytenhek This patch adds support for the Cirrus ep93xx series of CPUs. The ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs, IrDA, MaverickCrunch floating point coprocessor, between 24 and 64 GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster engine, graphics accelerator, IDE controller and a bunch of other stuff. This patch adds the core ep93xx support code, and support for the Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-20 10:10:13 -07:00
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =(EP93XX_AHB_VIRT_BASE)
orr \base, \base, #0x000b0000
mov \irqnr, #0
ldr \irqstat, [\base] @ lower 32 interrupts
cmp \irqstat, #0
bne 1001f
eor \base, \base, #0x00070000
ldr \irqstat, [\base] @ upper 32 interrupts
cmp \irqstat, #0
beq 1002f
mov \irqnr, #0x20
1001:
movs \tmp, \irqstat, lsl #16
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #16
movs \tmp, \irqstat, lsl #8
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #8
movs \tmp, \irqstat, lsl #4
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #4
movs \tmp, \irqstat, lsl #2
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #2
movs \tmp, \irqstat, lsl #1
addeq \irqnr, \irqnr, #1
orrs \base, \base, #1
1002:
.endm
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