2019-05-24 03:04:09 -07:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2015-10-13 09:10:29 -07:00
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/*
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* Copyright 2014-2015 Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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*/
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#include <linux/slab.h>
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#include <linux/kernel.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/spinlock.h>
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#include <linux/err.h>
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2019-12-11 03:41:47 -07:00
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#include <linux/module.h>
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2015-10-13 09:10:29 -07:00
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#include <linux/iio/iio.h>
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2019-12-11 04:56:15 -07:00
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#include <linux/iio/sysfs.h>
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2015-10-13 09:10:29 -07:00
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#include <linux/iio/buffer.h>
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2017-06-12 22:12:35 -07:00
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#include <linux/iio/buffer_impl.h>
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2015-10-13 09:10:29 -07:00
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#include <linux/iio/buffer-dma.h>
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#include <linux/iio/buffer-dmaengine.h>
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/*
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* The IIO DMAengine buffer combines the generic IIO DMA buffer infrastructure
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* with the DMAengine framework. The generic IIO DMA buffer infrastructure is
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* used to manage the buffer memory and implement the IIO buffer operations
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* while the DMAengine framework is used to perform the DMA transfers. Combined
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* this results in a device independent fully functional DMA buffer
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* implementation that can be used by device drivers for peripherals which are
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* connected to a DMA controller which has a DMAengine driver implementation.
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*/
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struct dmaengine_buffer {
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struct iio_dma_buffer_queue queue;
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struct dma_chan *chan;
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struct list_head active;
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size_t align;
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size_t max_size;
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};
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static struct dmaengine_buffer *iio_buffer_to_dmaengine_buffer(
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struct iio_buffer *buffer)
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{
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return container_of(buffer, struct dmaengine_buffer, queue.buffer);
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}
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2020-08-25 22:20:11 -07:00
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static void iio_dmaengine_buffer_block_done(void *data,
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const struct dmaengine_result *result)
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2015-10-13 09:10:29 -07:00
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{
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struct iio_dma_buffer_block *block = data;
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unsigned long flags;
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spin_lock_irqsave(&block->queue->list_lock, flags);
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list_del(&block->head);
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spin_unlock_irqrestore(&block->queue->list_lock, flags);
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2020-08-25 22:20:11 -07:00
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block->bytes_used -= result->residue;
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2015-10-13 09:10:29 -07:00
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iio_dma_buffer_block_done(block);
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}
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static int iio_dmaengine_buffer_submit_block(struct iio_dma_buffer_queue *queue,
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struct iio_dma_buffer_block *block)
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{
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struct dmaengine_buffer *dmaengine_buffer =
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iio_buffer_to_dmaengine_buffer(&queue->buffer);
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struct dma_async_tx_descriptor *desc;
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2024-04-19 01:25:37 -07:00
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enum dma_transfer_direction dma_dir;
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2024-06-20 05:27:24 -07:00
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struct scatterlist *sgl;
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struct dma_vec *vecs;
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2024-04-19 01:25:37 -07:00
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size_t max_size;
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2015-10-13 09:10:29 -07:00
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dma_cookie_t cookie;
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2024-06-20 05:27:24 -07:00
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size_t len_total;
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unsigned int i;
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int nents;
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2015-10-13 09:10:29 -07:00
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2024-04-19 01:25:37 -07:00
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max_size = min(block->size, dmaengine_buffer->max_size);
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max_size = round_down(max_size, dmaengine_buffer->align);
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2024-06-20 05:27:24 -07:00
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if (queue->buffer.direction == IIO_BUFFER_DIRECTION_IN)
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2024-04-19 01:25:37 -07:00
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dma_dir = DMA_DEV_TO_MEM;
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2024-06-20 05:27:24 -07:00
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else
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2024-04-19 01:25:37 -07:00
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dma_dir = DMA_MEM_TO_DEV;
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2024-06-20 05:27:24 -07:00
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if (block->sg_table) {
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sgl = block->sg_table->sgl;
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nents = sg_nents_for_len(sgl, block->bytes_used);
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if (nents < 0)
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return nents;
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vecs = kmalloc_array(nents, sizeof(*vecs), GFP_ATOMIC);
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if (!vecs)
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return -ENOMEM;
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len_total = block->bytes_used;
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2015-10-13 09:10:29 -07:00
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2024-06-20 05:27:24 -07:00
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for (i = 0; i < nents; i++) {
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vecs[i].addr = sg_dma_address(sgl);
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vecs[i].len = min(sg_dma_len(sgl), len_total);
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len_total -= vecs[i].len;
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sgl = sg_next(sgl);
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}
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desc = dmaengine_prep_peripheral_dma_vec(dmaengine_buffer->chan,
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vecs, nents, dma_dir,
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DMA_PREP_INTERRUPT);
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kfree(vecs);
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} else {
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max_size = min(block->size, dmaengine_buffer->max_size);
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max_size = round_down(max_size, dmaengine_buffer->align);
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if (queue->buffer.direction == IIO_BUFFER_DIRECTION_IN)
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block->bytes_used = max_size;
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if (!block->bytes_used || block->bytes_used > max_size)
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return -EINVAL;
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desc = dmaengine_prep_slave_single(dmaengine_buffer->chan,
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block->phys_addr,
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block->bytes_used,
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dma_dir,
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DMA_PREP_INTERRUPT);
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}
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2015-10-13 09:10:29 -07:00
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if (!desc)
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return -ENOMEM;
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2020-08-25 22:20:11 -07:00
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desc->callback_result = iio_dmaengine_buffer_block_done;
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2015-10-13 09:10:29 -07:00
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desc->callback_param = block;
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cookie = dmaengine_submit(desc);
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if (dma_submit_error(cookie))
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return dma_submit_error(cookie);
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spin_lock_irq(&dmaengine_buffer->queue.list_lock);
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list_add_tail(&block->head, &dmaengine_buffer->active);
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spin_unlock_irq(&dmaengine_buffer->queue.list_lock);
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dma_async_issue_pending(dmaengine_buffer->chan);
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return 0;
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}
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static void iio_dmaengine_buffer_abort(struct iio_dma_buffer_queue *queue)
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{
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struct dmaengine_buffer *dmaengine_buffer =
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iio_buffer_to_dmaengine_buffer(&queue->buffer);
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2016-02-08 10:51:58 -07:00
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dmaengine_terminate_sync(dmaengine_buffer->chan);
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2015-10-13 09:10:29 -07:00
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iio_dma_buffer_block_list_abort(queue, &dmaengine_buffer->active);
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}
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static void iio_dmaengine_buffer_release(struct iio_buffer *buf)
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{
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struct dmaengine_buffer *dmaengine_buffer =
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iio_buffer_to_dmaengine_buffer(buf);
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iio_dma_buffer_release(&dmaengine_buffer->queue);
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kfree(dmaengine_buffer);
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}
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static const struct iio_buffer_access_funcs iio_dmaengine_buffer_ops = {
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2019-12-11 03:43:00 -07:00
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.read = iio_dma_buffer_read,
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2024-04-19 01:25:38 -07:00
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.write = iio_dma_buffer_write,
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2015-10-13 09:10:29 -07:00
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.set_bytes_per_datum = iio_dma_buffer_set_bytes_per_datum,
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.set_length = iio_dma_buffer_set_length,
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.request_update = iio_dma_buffer_request_update,
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.enable = iio_dma_buffer_enable,
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.disable = iio_dma_buffer_disable,
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2024-04-19 01:25:35 -07:00
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.data_available = iio_dma_buffer_usage,
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2024-04-19 01:25:38 -07:00
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.space_available = iio_dma_buffer_usage,
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2015-10-13 09:10:29 -07:00
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.release = iio_dmaengine_buffer_release,
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2024-06-20 05:27:24 -07:00
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.enqueue_dmabuf = iio_dma_buffer_enqueue_dmabuf,
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.attach_dmabuf = iio_dma_buffer_attach_dmabuf,
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.detach_dmabuf = iio_dma_buffer_detach_dmabuf,
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.lock_queue = iio_dma_buffer_lock_queue,
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.unlock_queue = iio_dma_buffer_unlock_queue,
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2015-10-13 09:10:29 -07:00
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.modes = INDIO_BUFFER_HARDWARE,
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.flags = INDIO_BUFFER_FLAG_FIXED_WATERMARK,
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};
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static const struct iio_dma_buffer_ops iio_dmaengine_default_ops = {
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.submit = iio_dmaengine_buffer_submit_block,
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.abort = iio_dmaengine_buffer_abort,
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};
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2019-12-11 04:56:15 -07:00
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static ssize_t iio_dmaengine_buffer_get_length_align(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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2021-02-15 03:40:34 -07:00
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struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer;
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2019-12-11 04:56:15 -07:00
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struct dmaengine_buffer *dmaengine_buffer =
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2021-02-15 03:40:34 -07:00
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iio_buffer_to_dmaengine_buffer(buffer);
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2019-12-11 04:56:15 -07:00
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2021-12-16 11:52:06 -07:00
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return sysfs_emit(buf, "%zu\n", dmaengine_buffer->align);
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2019-12-11 04:56:15 -07:00
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}
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static IIO_DEVICE_ATTR(length_align_bytes, 0444,
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iio_dmaengine_buffer_get_length_align, NULL, 0);
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2022-10-03 01:13:53 -07:00
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static const struct iio_dev_attr *iio_dmaengine_buffer_attrs[] = {
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&iio_dev_attr_length_align_bytes,
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2019-12-11 04:56:15 -07:00
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NULL,
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};
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2015-10-13 09:10:29 -07:00
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/**
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* iio_dmaengine_buffer_alloc() - Allocate new buffer which uses DMAengine
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* @dev: Parent device for the buffer
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* @channel: DMA channel name, typically "rx".
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*
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* This allocates a new IIO buffer which internally uses the DMAengine framework
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* to perform its transfers. The parent device will be used to request the DMA
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* channel.
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*
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* Once done using the buffer iio_dmaengine_buffer_free() should be used to
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* release it.
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*/
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2024-04-19 01:25:34 -07:00
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static struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
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2015-10-13 09:10:29 -07:00
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const char *channel)
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{
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struct dmaengine_buffer *dmaengine_buffer;
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unsigned int width, src_width, dest_width;
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struct dma_slave_caps caps;
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struct dma_chan *chan;
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int ret;
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dmaengine_buffer = kzalloc(sizeof(*dmaengine_buffer), GFP_KERNEL);
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if (!dmaengine_buffer)
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return ERR_PTR(-ENOMEM);
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2019-11-13 02:24:53 -07:00
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chan = dma_request_chan(dev, channel);
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2015-10-13 09:10:29 -07:00
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if (IS_ERR(chan)) {
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ret = PTR_ERR(chan);
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goto err_free;
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}
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ret = dma_get_slave_caps(chan, &caps);
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if (ret < 0)
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2024-07-23 09:32:21 -07:00
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goto err_release;
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2015-10-13 09:10:29 -07:00
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/* Needs to be aligned to the maximum of the minimums */
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if (caps.src_addr_widths)
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src_width = __ffs(caps.src_addr_widths);
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else
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src_width = 1;
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if (caps.dst_addr_widths)
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dest_width = __ffs(caps.dst_addr_widths);
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else
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dest_width = 1;
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width = max(src_width, dest_width);
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INIT_LIST_HEAD(&dmaengine_buffer->active);
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dmaengine_buffer->chan = chan;
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dmaengine_buffer->align = width;
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dmaengine_buffer->max_size = dma_get_max_seg_size(chan->device->dev);
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iio_dma_buffer_init(&dmaengine_buffer->queue, chan->device->dev,
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&iio_dmaengine_default_ops);
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2020-09-29 05:59:41 -07:00
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dmaengine_buffer->queue.buffer.attrs = iio_dmaengine_buffer_attrs;
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2015-10-13 09:10:29 -07:00
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dmaengine_buffer->queue.buffer.access = &iio_dmaengine_buffer_ops;
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return &dmaengine_buffer->queue.buffer;
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2024-07-23 09:32:21 -07:00
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err_release:
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dma_release_channel(chan);
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2015-10-13 09:10:29 -07:00
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err_free:
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kfree(dmaengine_buffer);
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return ERR_PTR(ret);
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}
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/**
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* iio_dmaengine_buffer_free() - Free dmaengine buffer
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* @buffer: Buffer to free
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*
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* Frees a buffer previously allocated with iio_dmaengine_buffer_alloc().
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*/
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2024-02-10 13:57:16 -07:00
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void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
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2015-10-13 09:10:29 -07:00
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{
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struct dmaengine_buffer *dmaengine_buffer =
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iio_buffer_to_dmaengine_buffer(buffer);
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iio_dma_buffer_exit(&dmaengine_buffer->queue);
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dma_release_channel(dmaengine_buffer->chan);
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iio_buffer_put(buffer);
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}
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2024-02-10 13:57:16 -07:00
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EXPORT_SYMBOL_NS_GPL(iio_dmaengine_buffer_free, IIO_DMAENGINE_BUFFER);
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2019-12-11 03:41:47 -07:00
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2024-04-19 01:25:37 -07:00
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struct iio_buffer *iio_dmaengine_buffer_setup_ext(struct device *dev,
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struct iio_dev *indio_dev,
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const char *channel,
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enum iio_buffer_direction dir)
|
2020-03-24 06:46:32 -07:00
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{
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2021-04-08 04:38:11 -07:00
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struct iio_buffer *buffer;
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int ret;
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2020-03-24 06:46:32 -07:00
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buffer = iio_dmaengine_buffer_alloc(dev, channel);
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2021-04-08 04:38:11 -07:00
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if (IS_ERR(buffer))
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2024-04-19 01:25:34 -07:00
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return ERR_CAST(buffer);
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indio_dev->modes |= INDIO_BUFFER_HARDWARE;
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2020-03-24 06:46:32 -07:00
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2024-04-19 01:25:37 -07:00
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buffer->direction = dir;
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2024-04-19 01:25:34 -07:00
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ret = iio_device_attach_buffer(indio_dev, buffer);
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if (ret) {
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iio_dmaengine_buffer_free(buffer);
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2021-04-08 04:38:11 -07:00
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return ERR_PTR(ret);
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2024-04-19 01:25:34 -07:00
|
|
|
}
|
2020-03-24 06:46:32 -07:00
|
|
|
|
|
|
|
return buffer;
|
|
|
|
}
|
2024-04-19 01:25:37 -07:00
|
|
|
EXPORT_SYMBOL_NS_GPL(iio_dmaengine_buffer_setup_ext, IIO_DMAENGINE_BUFFER);
|
2024-04-19 01:25:34 -07:00
|
|
|
|
|
|
|
static void __devm_iio_dmaengine_buffer_free(void *buffer)
|
|
|
|
{
|
|
|
|
iio_dmaengine_buffer_free(buffer);
|
|
|
|
}
|
2021-02-15 03:40:25 -07:00
|
|
|
|
|
|
|
/**
|
2024-04-19 01:25:37 -07:00
|
|
|
* devm_iio_dmaengine_buffer_setup_ext() - Setup a DMA buffer for an IIO device
|
2021-02-15 03:40:25 -07:00
|
|
|
* @dev: Parent device for the buffer
|
|
|
|
* @indio_dev: IIO device to which to attach this buffer.
|
|
|
|
* @channel: DMA channel name, typically "rx".
|
2024-04-19 01:25:37 -07:00
|
|
|
* @dir: Direction of buffer (in or out)
|
2021-02-15 03:40:25 -07:00
|
|
|
*
|
|
|
|
* This allocates a new IIO buffer with devm_iio_dmaengine_buffer_alloc()
|
|
|
|
* and attaches it to an IIO device with iio_device_attach_buffer().
|
|
|
|
* It also appends the INDIO_BUFFER_HARDWARE mode to the supported modes of the
|
|
|
|
* IIO device.
|
|
|
|
*/
|
2024-04-19 01:25:37 -07:00
|
|
|
int devm_iio_dmaengine_buffer_setup_ext(struct device *dev,
|
|
|
|
struct iio_dev *indio_dev,
|
|
|
|
const char *channel,
|
|
|
|
enum iio_buffer_direction dir)
|
2021-02-15 03:40:25 -07:00
|
|
|
{
|
|
|
|
struct iio_buffer *buffer;
|
|
|
|
|
2024-04-19 01:25:37 -07:00
|
|
|
buffer = iio_dmaengine_buffer_setup_ext(dev, indio_dev, channel, dir);
|
2021-02-15 03:40:25 -07:00
|
|
|
if (IS_ERR(buffer))
|
|
|
|
return PTR_ERR(buffer);
|
|
|
|
|
2024-04-19 01:25:34 -07:00
|
|
|
return devm_add_action_or_reset(dev, __devm_iio_dmaengine_buffer_free,
|
|
|
|
buffer);
|
2021-02-15 03:40:25 -07:00
|
|
|
}
|
2024-04-19 01:25:37 -07:00
|
|
|
EXPORT_SYMBOL_NS_GPL(devm_iio_dmaengine_buffer_setup_ext, IIO_DMAENGINE_BUFFER);
|
2020-03-24 06:46:32 -07:00
|
|
|
|
2019-12-11 03:41:47 -07:00
|
|
|
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
|
|
|
|
MODULE_DESCRIPTION("DMA buffer for the IIO framework");
|
|
|
|
MODULE_LICENSE("GPL");
|
2024-07-26 04:31:15 -07:00
|
|
|
MODULE_IMPORT_NS(IIO_DMA_BUFFER);
|