2023-12-19 13:32:36 -07:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices AD7091R8 12-bit SAR ADC driver
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*
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* Copyright 2023 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/gpio/consumer.h>
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#include <linux/spi/spi.h>
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#include "ad7091r-base.h"
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#define AD7091R8_REG_ADDR_MSK GENMASK(15, 11)
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#define AD7091R8_RD_WR_FLAG_MSK BIT(10)
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#define AD7091R8_REG_DATA_MSK GENMASK(9, 0)
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#define AD7091R_SPI_REGMAP_CONFIG(n) { \
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.reg_bits = 8, \
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.val_bits = 16, \
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.volatile_reg = ad7091r_volatile_reg, \
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.writeable_reg = ad7091r_writeable_reg, \
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.max_register = AD7091R_REG_CH_HYSTERESIS(n), \
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}
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static int ad7091r8_set_mode(struct ad7091r_state *st, enum ad7091r_mode mode)
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{
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/* AD7091R-2/-4/-8 don't set sample/command/autocycle mode in conf reg */
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st->mode = mode;
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return 0;
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}
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static unsigned int ad7091r8_reg_result_chan_id(unsigned int val)
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{
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return AD7091R8_REG_RESULT_CH_ID(val);
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}
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#define AD7091R_SPI_CHIP_INFO(_n, _name) { \
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.name = _name, \
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.channels = ad7091r##_n##_channels, \
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.num_channels = ARRAY_SIZE(ad7091r##_n##_channels), \
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.vref_mV = 2500, \
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.reg_result_chan_id = &ad7091r8_reg_result_chan_id, \
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.set_mode = &ad7091r8_set_mode, \
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}
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#define AD7091R_SPI_CHIP_INFO_IRQ(_n, _name) { \
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.name = _name, \
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.channels = ad7091r##_n##_channels_irq, \
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.num_channels = ARRAY_SIZE(ad7091r##_n##_channels_irq), \
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.vref_mV = 2500, \
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.reg_result_chan_id = &ad7091r8_reg_result_chan_id, \
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.set_mode = &ad7091r8_set_mode, \
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}
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enum ad7091r8_info_ids {
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AD7091R2_INFO,
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AD7091R4_INFO,
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AD7091R4_INFO_IRQ,
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AD7091R8_INFO,
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AD7091R8_INFO_IRQ,
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};
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static const struct iio_chan_spec ad7091r2_channels[] = {
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AD7091R_CHANNEL(0, 12, NULL, 0),
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AD7091R_CHANNEL(1, 12, NULL, 0),
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};
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static const struct iio_chan_spec ad7091r4_channels[] = {
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AD7091R_CHANNEL(0, 12, NULL, 0),
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AD7091R_CHANNEL(1, 12, NULL, 0),
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AD7091R_CHANNEL(2, 12, NULL, 0),
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AD7091R_CHANNEL(3, 12, NULL, 0),
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};
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static const struct iio_chan_spec ad7091r4_channels_irq[] = {
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AD7091R_CHANNEL(0, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(1, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(2, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(3, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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};
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static const struct iio_chan_spec ad7091r8_channels[] = {
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AD7091R_CHANNEL(0, 12, NULL, 0),
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AD7091R_CHANNEL(1, 12, NULL, 0),
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AD7091R_CHANNEL(2, 12, NULL, 0),
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AD7091R_CHANNEL(3, 12, NULL, 0),
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AD7091R_CHANNEL(4, 12, NULL, 0),
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AD7091R_CHANNEL(5, 12, NULL, 0),
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AD7091R_CHANNEL(6, 12, NULL, 0),
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AD7091R_CHANNEL(7, 12, NULL, 0),
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};
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static const struct iio_chan_spec ad7091r8_channels_irq[] = {
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AD7091R_CHANNEL(0, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(1, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(2, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(3, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(4, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(5, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(6, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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AD7091R_CHANNEL(7, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
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};
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static void ad7091r_pulse_convst(struct ad7091r_state *st)
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{
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gpiod_set_value_cansleep(st->convst_gpio, 1);
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gpiod_set_value_cansleep(st->convst_gpio, 0);
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}
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static int ad7091r_regmap_bus_reg_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct ad7091r_state *st = context;
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struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
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int ret;
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struct spi_transfer t[] = {
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{
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.tx_buf = &st->tx_buf,
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.len = 2,
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.cs_change = 1,
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}, {
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.rx_buf = &st->rx_buf,
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.len = 2,
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}
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};
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if (reg == AD7091R_REG_RESULT)
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ad7091r_pulse_convst(st);
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st->tx_buf = cpu_to_be16(reg << 11);
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ret = spi_sync_transfer(spi, t, ARRAY_SIZE(t));
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if (ret < 0)
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return ret;
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*val = be16_to_cpu(st->rx_buf);
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return 0;
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}
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static int ad7091r_regmap_bus_reg_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct ad7091r_state *st = context;
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struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
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/*
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* AD7091R-2/-4/-8 protocol (datasheet page 31) is to do a single SPI
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* transfer with reg address set in bits B15:B11 and value set in B9:B0.
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*/
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st->tx_buf = cpu_to_be16(FIELD_PREP(AD7091R8_REG_DATA_MSK, val) |
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FIELD_PREP(AD7091R8_RD_WR_FLAG_MSK, 1) |
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FIELD_PREP(AD7091R8_REG_ADDR_MSK, reg));
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return spi_write(spi, &st->tx_buf, 2);
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}
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2024-07-03 14:04:47 -07:00
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static const struct regmap_bus ad7091r8_regmap_bus = {
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2023-12-19 13:32:36 -07:00
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.reg_read = ad7091r_regmap_bus_reg_read,
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.reg_write = ad7091r_regmap_bus_reg_write,
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.reg_format_endian_default = REGMAP_ENDIAN_BIG,
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.val_format_endian_default = REGMAP_ENDIAN_BIG,
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};
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static const struct ad7091r_chip_info ad7091r8_infos[] = {
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[AD7091R2_INFO] = AD7091R_SPI_CHIP_INFO(2, "ad7091r-2"),
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[AD7091R4_INFO] = AD7091R_SPI_CHIP_INFO(4, "ad7091r-4"),
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[AD7091R4_INFO_IRQ] = AD7091R_SPI_CHIP_INFO_IRQ(4, "ad7091r-4"),
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[AD7091R8_INFO] = AD7091R_SPI_CHIP_INFO(8, "ad7091r-8"),
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[AD7091R8_INFO_IRQ] = AD7091R_SPI_CHIP_INFO_IRQ(8, "ad7091r-8")
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};
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static const struct regmap_config ad7091r2_reg_conf = AD7091R_SPI_REGMAP_CONFIG(2);
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static const struct regmap_config ad7091r4_reg_conf = AD7091R_SPI_REGMAP_CONFIG(4);
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static const struct regmap_config ad7091r8_reg_conf = AD7091R_SPI_REGMAP_CONFIG(8);
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static void ad7091r8_regmap_init(struct ad7091r_state *st,
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const struct regmap_config *regmap_conf)
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{
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st->map = devm_regmap_init(st->dev, &ad7091r8_regmap_bus, st,
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regmap_conf);
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}
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static int ad7091r8_gpio_setup(struct ad7091r_state *st)
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{
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st->convst_gpio = devm_gpiod_get(st->dev, "convst", GPIOD_OUT_LOW);
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if (IS_ERR(st->convst_gpio))
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return dev_err_probe(st->dev, PTR_ERR(st->convst_gpio),
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"Error getting convst GPIO\n");
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st->reset_gpio = devm_gpiod_get_optional(st->dev, "reset",
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GPIOD_OUT_HIGH);
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if (IS_ERR(st->reset_gpio))
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2024-01-08 02:07:02 -07:00
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return dev_err_probe(st->dev, PTR_ERR(st->reset_gpio),
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2023-12-19 13:32:36 -07:00
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"Error on requesting reset GPIO\n");
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if (st->reset_gpio) {
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fsleep(20);
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gpiod_set_value_cansleep(st->reset_gpio, 0);
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}
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return 0;
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}
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static struct ad7091r_init_info ad7091r2_init_info = {
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.info_no_irq = &ad7091r8_infos[AD7091R2_INFO],
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.regmap_config = &ad7091r2_reg_conf,
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.init_adc_regmap = &ad7091r8_regmap_init,
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.setup = &ad7091r8_gpio_setup
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};
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static struct ad7091r_init_info ad7091r4_init_info = {
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.info_no_irq = &ad7091r8_infos[AD7091R4_INFO],
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.info_irq = &ad7091r8_infos[AD7091R4_INFO_IRQ],
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.regmap_config = &ad7091r4_reg_conf,
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.init_adc_regmap = &ad7091r8_regmap_init,
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.setup = &ad7091r8_gpio_setup
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};
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static struct ad7091r_init_info ad7091r8_init_info = {
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.info_no_irq = &ad7091r8_infos[AD7091R8_INFO],
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.info_irq = &ad7091r8_infos[AD7091R8_INFO_IRQ],
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.regmap_config = &ad7091r8_reg_conf,
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.init_adc_regmap = &ad7091r8_regmap_init,
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.setup = &ad7091r8_gpio_setup
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};
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static int ad7091r8_spi_probe(struct spi_device *spi)
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{
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const struct ad7091r_init_info *init_info;
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init_info = spi_get_device_match_data(spi);
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if (!init_info)
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return -EINVAL;
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return ad7091r_probe(&spi->dev, init_info, spi->irq);
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}
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static const struct of_device_id ad7091r8_of_match[] = {
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{ .compatible = "adi,ad7091r2", .data = &ad7091r2_init_info },
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{ .compatible = "adi,ad7091r4", .data = &ad7091r4_init_info },
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{ .compatible = "adi,ad7091r8", .data = &ad7091r8_init_info },
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{ }
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};
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MODULE_DEVICE_TABLE(of, ad7091r8_of_match);
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static const struct spi_device_id ad7091r8_spi_id[] = {
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{ "ad7091r2", (kernel_ulong_t)&ad7091r2_init_info },
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{ "ad7091r4", (kernel_ulong_t)&ad7091r4_init_info },
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{ "ad7091r8", (kernel_ulong_t)&ad7091r8_init_info },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, ad7091r8_spi_id);
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static struct spi_driver ad7091r8_driver = {
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.driver = {
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.name = "ad7091r8",
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.of_match_table = ad7091r8_of_match,
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},
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.probe = ad7091r8_spi_probe,
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.id_table = ad7091r8_spi_id,
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};
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module_spi_driver(ad7091r8_driver);
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MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt@analog.com>");
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MODULE_DESCRIPTION("Analog Devices AD7091R8 ADC driver");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(IIO_AD7091R);
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