License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 07:07:57 -07:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2012-11-01 07:55:04 -07:00
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#ifndef _ASM_POWERPC_SETUP_H
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#define _ASM_POWERPC_SETUP_H
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#include <uapi/asm/setup.h>
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#ifndef __ASSEMBLY__
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extern void ppc_printk_progress(char *s, unsigned short hex);
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extern unsigned long long memory_limit;
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struct device_node;
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/* Used in very early kernel initialization. */
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extern unsigned long reloc_offset(void);
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extern unsigned long add_reloc_offset(unsigned long);
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extern void reloc_got2(unsigned long);
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#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
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2013-10-28 07:20:51 -07:00
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void check_for_initrd(void);
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2018-02-13 08:08:16 -07:00
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void mem_topology_setup(void);
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2014-09-17 05:15:33 -07:00
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void initmem_init(void);
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2017-12-03 22:27:25 -07:00
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void setup_panic(void);
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2013-11-25 16:23:11 -07:00
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#define ARCH_PANIC_TIMEOUT 180
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2013-10-28 07:20:51 -07:00
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2016-07-04 22:03:49 -07:00
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#ifdef CONFIG_PPC_PSERIES
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2022-03-06 19:26:25 -07:00
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extern bool pseries_reloc_on_exception(void);
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2020-06-11 01:12:03 -07:00
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extern bool pseries_enable_reloc_on_exc(void);
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2016-07-04 22:03:49 -07:00
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extern void pseries_disable_reloc_on_exc(void);
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extern void pseries_big_endian_exceptions(void);
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2021-12-16 15:00:27 -07:00
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void __init pseries_little_endian_exceptions(void);
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2016-07-04 22:03:49 -07:00
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#else
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2022-03-06 19:26:25 -07:00
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static inline bool pseries_reloc_on_exception(void) { return false; }
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2020-06-11 01:12:03 -07:00
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static inline bool pseries_enable_reloc_on_exc(void) { return false; }
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2016-07-04 22:03:49 -07:00
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static inline void pseries_disable_reloc_on_exc(void) {}
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static inline void pseries_big_endian_exceptions(void) {}
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static inline void pseries_little_endian_exceptions(void) {}
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#endif /* CONFIG_PPC_PSERIES */
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powerpc/64s: Add support for RFI flush of L1-D cache
On some CPUs we can prevent the Meltdown vulnerability by flushing the
L1-D cache on exit from kernel to user mode, and from hypervisor to
guest.
This is known to be the case on at least Power7, Power8 and Power9. At
this time we do not know the status of the vulnerability on other CPUs
such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale
CPUs. As more information comes to light we can enable this, or other
mechanisms on those CPUs.
The vulnerability occurs when the load of an architecturally
inaccessible memory region (eg. userspace load of kernel memory) is
speculatively executed to the point where its result can influence the
address of a subsequent speculatively executed load.
In order for that to happen, the first load must hit in the L1,
because before the load is sent to the L2 the permission check is
performed. Therefore if no kernel addresses hit in the L1 the
vulnerability can not occur. We can ensure that is the case by
flushing the L1 whenever we return to userspace. Similarly for
hypervisor vs guest.
In order to flush the L1-D cache on exit, we add a section of nops at
each (h)rfi location that returns to a lower privileged context, and
patch that with some sequence. Newer firmwares are able to advertise
to us that there is a special nop instruction that flushes the L1-D.
If we do not see that advertised, we fall back to doing a displacement
flush in software.
For guest kernels we support migration between some CPU versions, and
different CPUs may use different flush instructions. So that we are
prepared to migrate to a machine with a different flush instruction
activated, we may have to patch more than one flush instruction at
boot if the hypervisor tells us to.
In the end this patch is mostly the work of Nicholas Piggin and
Michael Ellerman. However a cast of thousands contributed to analysis
of the issue, earlier versions of the patch, back ports testing etc.
Many thanks to all of them.
Tested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-01-09 09:07:15 -07:00
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void rfi_flush_enable(bool enable);
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/* These are bit flags */
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enum l1d_flush_type {
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L1D_FLUSH_NONE = 0x1,
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L1D_FLUSH_FALLBACK = 0x2,
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L1D_FLUSH_ORI = 0x4,
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L1D_FLUSH_MTTRIG = 0x8,
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};
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2018-03-14 15:40:39 -07:00
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void setup_rfi_flush(enum l1d_flush_type, bool enable);
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2020-11-16 22:59:12 -07:00
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void setup_entry_flush(bool enable);
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void setup_uaccess_flush(bool enable);
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powerpc/64s: Add support for RFI flush of L1-D cache
On some CPUs we can prevent the Meltdown vulnerability by flushing the
L1-D cache on exit from kernel to user mode, and from hypervisor to
guest.
This is known to be the case on at least Power7, Power8 and Power9. At
this time we do not know the status of the vulnerability on other CPUs
such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale
CPUs. As more information comes to light we can enable this, or other
mechanisms on those CPUs.
The vulnerability occurs when the load of an architecturally
inaccessible memory region (eg. userspace load of kernel memory) is
speculatively executed to the point where its result can influence the
address of a subsequent speculatively executed load.
In order for that to happen, the first load must hit in the L1,
because before the load is sent to the L2 the permission check is
performed. Therefore if no kernel addresses hit in the L1 the
vulnerability can not occur. We can ensure that is the case by
flushing the L1 whenever we return to userspace. Similarly for
hypervisor vs guest.
In order to flush the L1-D cache on exit, we add a section of nops at
each (h)rfi location that returns to a lower privileged context, and
patch that with some sequence. Newer firmwares are able to advertise
to us that there is a special nop instruction that flushes the L1-D.
If we do not see that advertised, we fall back to doing a displacement
flush in software.
For guest kernels we support migration between some CPU versions, and
different CPUs may use different flush instructions. So that we are
prepared to migrate to a machine with a different flush instruction
activated, we may have to patch more than one flush instruction at
boot if the hypervisor tells us to.
In the end this patch is mostly the work of Nicholas Piggin and
Michael Ellerman. However a cast of thousands contributed to analysis
of the issue, earlier versions of the patch, back ports testing etc.
Many thanks to all of them.
Tested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-01-09 09:07:15 -07:00
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void do_rfi_flush_fixups(enum l1d_flush_type types);
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2018-07-27 16:06:35 -07:00
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#ifdef CONFIG_PPC_BARRIER_NOSPEC
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2021-12-16 15:00:16 -07:00
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void __init setup_barrier_nospec(void);
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2018-07-27 16:06:35 -07:00
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#else
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2021-01-25 02:53:38 -07:00
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static inline void setup_barrier_nospec(void) { }
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2018-07-27 16:06:35 -07:00
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#endif
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2020-11-16 22:59:13 -07:00
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void do_uaccess_flush_fixups(enum l1d_flush_type types);
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2020-11-16 22:59:12 -07:00
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void do_entry_flush_fixups(enum l1d_flush_type types);
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2018-04-23 21:15:55 -07:00
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void do_barrier_nospec_fixups(bool enable);
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2018-04-23 21:15:56 -07:00
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extern bool barrier_nospec_enabled;
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2018-07-27 16:06:34 -07:00
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#ifdef CONFIG_PPC_BARRIER_NOSPEC
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2018-04-23 21:15:56 -07:00
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void do_barrier_nospec_fixups_range(bool enable, void *start, void *end);
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#else
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2021-01-25 02:53:38 -07:00
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static inline void do_barrier_nospec_fixups_range(bool enable, void *start, void *end) { }
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2018-04-23 21:15:56 -07:00
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#endif
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powerpc/64s: Add support for RFI flush of L1-D cache
On some CPUs we can prevent the Meltdown vulnerability by flushing the
L1-D cache on exit from kernel to user mode, and from hypervisor to
guest.
This is known to be the case on at least Power7, Power8 and Power9. At
this time we do not know the status of the vulnerability on other CPUs
such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale
CPUs. As more information comes to light we can enable this, or other
mechanisms on those CPUs.
The vulnerability occurs when the load of an architecturally
inaccessible memory region (eg. userspace load of kernel memory) is
speculatively executed to the point where its result can influence the
address of a subsequent speculatively executed load.
In order for that to happen, the first load must hit in the L1,
because before the load is sent to the L2 the permission check is
performed. Therefore if no kernel addresses hit in the L1 the
vulnerability can not occur. We can ensure that is the case by
flushing the L1 whenever we return to userspace. Similarly for
hypervisor vs guest.
In order to flush the L1-D cache on exit, we add a section of nops at
each (h)rfi location that returns to a lower privileged context, and
patch that with some sequence. Newer firmwares are able to advertise
to us that there is a special nop instruction that flushes the L1-D.
If we do not see that advertised, we fall back to doing a displacement
flush in software.
For guest kernels we support migration between some CPU versions, and
different CPUs may use different flush instructions. So that we are
prepared to migrate to a machine with a different flush instruction
activated, we may have to patch more than one flush instruction at
boot if the hypervisor tells us to.
In the end this patch is mostly the work of Nicholas Piggin and
Michael Ellerman. However a cast of thousands contributed to analysis
of the issue, earlier versions of the patch, back ports testing etc.
Many thanks to all of them.
Tested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-01-09 09:07:15 -07:00
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2022-09-19 10:01:38 -07:00
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#ifdef CONFIG_PPC_E500
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2021-12-16 15:00:16 -07:00
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void __init setup_spectre_v2(void);
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2018-12-12 07:03:04 -07:00
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#else
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2021-01-25 02:53:38 -07:00
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static inline void setup_spectre_v2(void) {}
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2018-12-12 07:03:04 -07:00
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#endif
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2021-12-16 15:00:17 -07:00
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void __init do_btb_flush_fixups(void);
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2018-12-12 07:03:00 -07:00
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2022-03-04 10:04:05 -07:00
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#ifdef CONFIG_PPC32
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unsigned long __init early_init(unsigned long dt_ptr);
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void __init machine_init(u64 dt_ptr);
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#endif
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void __init early_setup(unsigned long dt_ptr);
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void early_setup_secondary(void);
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2022-06-11 09:55:16 -07:00
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/* prom_init (OpenFirmware) */
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unsigned long __init prom_init(unsigned long r3, unsigned long r4,
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unsigned long pp, unsigned long r6,
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unsigned long r7, unsigned long kbase);
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2022-09-30 01:27:04 -07:00
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extern struct seq_buf ppc_hw_desc;
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2012-11-01 07:55:04 -07:00
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_POWERPC_SETUP_H */
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