2020-03-12 02:58:05 -07:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments K3 SoC Watchdog Timer
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maintainers:
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- Tero Kristo <t-kristo@ti.com>
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description:
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The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
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Interrupt) IP module. This timer adds a support for windowed watchdog
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mode, which will signal an error if it is pinged outside the watchdog
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time window, meaning either too early or too late. The error signal
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generated can be routed to either interrupt a safety controller or
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to directly reset the SoC.
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allOf:
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- $ref: watchdog.yaml#
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properties:
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compatible:
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enum:
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- ti,j7-rti-wdt
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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2023-07-17 19:10:05 -07:00
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memory-region:
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maxItems: 1
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description:
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Contains the watchdog reserved memory. It is optional.
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In the reserved memory, the specified values, which are
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PON_REASON_SOF_NUM(0xBBBBCCCC), PON_REASON_MAGIC_NUM(0xDDDDDDDD),
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and PON_REASON_EOF_NUM(0xCCCCBBBB), are pre-stored at the first
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3 * 4 bytes to tell that last boot was caused by watchdog reset.
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Once the PON reason is captured by driver(rti_wdt.c), the driver
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is supposed to wipe the whole memory region. Surely, if this
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property is set, at least 12 bytes reserved memory starting from
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specific memory address(0xa220000) should be set. More please
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refer to example.
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2020-03-12 02:58:05 -07:00
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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2020-10-05 11:38:27 -07:00
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unevaluatedProperties: false
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2020-03-12 02:58:05 -07:00
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examples:
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- |
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/*
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* RTI WDT in main domain on J721e SoC. Assigned clocks are used to
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* select the source clock for the watchdog, forcing it to tick with
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* a 32kHz clock in this case. Add a reserved memory(optional) to keep
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* the watchdog reset cause persistent, which was be written in 12 bytes
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* starting from 0xa2200000 by RTI Watchdog Firmware, then make it
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* possible to get watchdog reset cause in driver.
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*
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* Reserved memory should be defined as follows:
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* reserved-memory {
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* wdt_reset_memory_region: wdt-memory@a2200000 {
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* reg = <0x00 0xa2200000 0x00 0x1000>;
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* no-map;
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* };
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* }
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*/
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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2021-01-28 17:28:43 -07:00
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watchdog@2200000 {
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compatible = "ti,j7-rti-wdt";
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reg = <0x2200000 0x100>;
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clocks = <&k3_clks 252 1>;
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power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
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assigned-clocks = <&k3_clks 252 1>;
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assigned-clock-parents = <&k3_clks 252 5>;
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memory-region = <&wdt_reset_memory_region>;
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};
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