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AES-256-GCM (AES-NI): prefetch the next blocks
...while computing the GHASH of the previous blocks. For AMD CPUs with disabled hardware prefetchers, the gain may be significant.
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@ -444,6 +444,11 @@ aes_gcm_encrypt_generic(const State *st, GHash *sth, unsigned char mac[ABYTES],
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counter = incr_counters(rev_counters, counter, PARALLEL_BLOCKS);
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counter = incr_counters(rev_counters, counter, PARALLEL_BLOCKS);
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encrypt_xor_wide(st, dst + i, src + i, rev_counters);
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encrypt_xor_wide(st, dst + i, src + i, rev_counters);
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PREFETCH_READ(src + i + PARALLEL_BLOCKS * 16);
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#if PARALLEL_BLOCKS >= 64 / 16
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PREFETCH_READ(src + i + PARALLEL_BLOCKS * 16 + 64);
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#endif
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pi = i - PARALLEL_BLOCKS * 16;
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pi = i - PARALLEL_BLOCKS * 16;
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u = gh_update0(sth, dst + pi, st->hx[2 * PARALLEL_BLOCKS - 1 - 0]);
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u = gh_update0(sth, dst + pi, st->hx[2 * PARALLEL_BLOCKS - 1 - 0]);
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for (j = 1; j < PARALLEL_BLOCKS; j += 1) {
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for (j = 1; j < PARALLEL_BLOCKS; j += 1) {
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@ -454,6 +459,10 @@ aes_gcm_encrypt_generic(const State *st, GHash *sth, unsigned char mac[ABYTES],
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encrypt_xor_wide(st, dst + i + PARALLEL_BLOCKS * 16, src + i + PARALLEL_BLOCKS * 16,
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encrypt_xor_wide(st, dst + i + PARALLEL_BLOCKS * 16, src + i + PARALLEL_BLOCKS * 16,
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rev_counters);
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rev_counters);
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PREFETCH_READ(src + i + 2 * PARALLEL_BLOCKS * 16);
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#if PARALLEL_BLOCKS >= 64 / 16
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PREFETCH_READ(src + i + 2 * PARALLEL_BLOCKS * 16 + 64);
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#endif
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pi = i;
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pi = i;
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for (j = 0; j < PARALLEL_BLOCKS; j += 1) {
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for (j = 0; j < PARALLEL_BLOCKS; j += 1) {
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gh_update(&u, dst + pi + j * 16, st->hx[PARALLEL_BLOCKS - 1 - j]);
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gh_update(&u, dst + pi + j * 16, st->hx[PARALLEL_BLOCKS - 1 - j]);
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